char-fork/llama.cpp

git clone https://git.t4t.associates/char-fork/llama.cpp

Oliver SimonsCUDA: Optimize `reduce_rows_f32` kernel, leading up to 25x perf improvement on kernel-level and 10% perf increase for Gemma3n (#15132)6028bf743

char/aliceai-t5-moe
brancheschar/aliceai-t5-moeall refs →
1.3 KiB41 linesraw
1#include "sum.cuh"
2#include "sumrows.cuh"
3
4#ifdef GGML_CUDA_USE_CUB
5#include <cub/cub.cuh>
6using namespace cub;
7#endif  // GGML_CUDA_USE_CUB
8
9#include <cstdint>
10
11void sum_f32_cuda(ggml_cuda_pool & pool, const float * x, float * dst, const int64_t ne, cudaStream_t stream) {
12#ifdef GGML_CUDA_USE_CUB
13    size_t tmp_size = 0;
14    DeviceReduce::Sum(nullptr,       tmp_size, x, dst, ne, stream);
15    ggml_cuda_pool_alloc<uint8_t> tmp_alloc(pool, tmp_size);
16    DeviceReduce::Sum(tmp_alloc.ptr, tmp_size, x, dst, ne, stream);
17#else
18    // Use (inefficient) sum_rows implementation as a fallback.
19    // For AMD there is rocPRIM which could be used as a drop-in replacement via hipcub but this would require C++11 -> C++14.
20    sum_rows_f32_cuda(x, dst, ne, 1, stream);
21    GGML_UNUSED(pool);
22#endif // GGML_CUDA_USE_CUB
23}
24
25void ggml_cuda_op_sum(ggml_backend_cuda_context & ctx, ggml_tensor * dst) {
26    const ggml_tensor * src0 = dst->src[0];
27
28    GGML_ASSERT(src0->type == GGML_TYPE_F32);
29    GGML_ASSERT( dst->type == GGML_TYPE_F32);
30    GGML_ASSERT(ggml_is_contiguously_allocated(src0));
31
32    const float * src0_d = (const float *) src0->data;
33    float * dst_d = (float *) dst->data;
34
35    const int64_t ne = ggml_nelements(src0);
36
37    ggml_cuda_pool & pool = ctx.pool();
38    cudaStream_t stream = ctx.stream();
39
40    sum_f32_cuda(pool, src0_d, dst_d, ne, stream);
41}