char-fork/llama.cpp
git clone https://git.t4t.associates/char-fork/llama.cpp
13e673863
char/aliceai-t5-moe
1// Dynamic quantizers that produce tiled activations 2 3static inline void quantize_block_f32_q8_1_tiled (float * restrictx ,uint8_t * restricty_block ) { 4assert ((unsigned long )x %128 == 0 ); 5assert ((unsigned long )y_block %128 == 0 ); 6 7HVX_Vector * vx = (HVX_Vector * )x ; 8HVX_Vector zero = Q6_V_vzero (); 9 10HVX_Vector vmax0_sf = hvx_vec_reduce_max_f32 (hvx_vec_abs_f32 (vx [0 ])); 11HVX_Vector vmax1_sf = hvx_vec_reduce_max_f32 (hvx_vec_abs_f32 (vx [1 ])); 12HVX_Vector vmax2_sf = hvx_vec_reduce_max_f32 (hvx_vec_abs_f32 (vx [2 ])); 13HVX_Vector vmax3_sf = hvx_vec_reduce_max_f32 (hvx_vec_abs_f32 (vx [3 ])); 14 15HVX_Vector vx0_qf = Q6_Vqf32_vsub_VsfVsf (vx [0 ],zero ); 16HVX_Vector vx1_qf = Q6_Vqf32_vsub_VsfVsf (vx [1 ],zero ); 17HVX_Vector vx2_qf = Q6_Vqf32_vsub_VsfVsf (vx [2 ],zero ); 18HVX_Vector vx3_qf = Q6_Vqf32_vsub_VsfVsf (vx [3 ],zero ); 19 20HVX_Vector vmax0_qf = Q6_Vqf32_vsub_VsfVsf (vmax0_sf ,zero ); 21HVX_Vector vmax1_qf = Q6_Vqf32_vsub_VsfVsf (vmax1_sf ,zero ); 22HVX_Vector vmax2_qf = Q6_Vqf32_vsub_VsfVsf (vmax2_sf ,zero ); 23HVX_Vector vmax3_qf = Q6_Vqf32_vsub_VsfVsf (vmax3_sf ,zero ); 24 25HVX_Vector vmax01_hf = Q6_Vh_vdeal_Vh (Q6_Vhf_equals_Wqf32 (Q6_W_vcombine_VV (vmax1_qf ,vmax0_qf ))); 26HVX_Vector vmax23_hf = Q6_Vh_vdeal_Vh (Q6_Vhf_equals_Wqf32 (Q6_W_vcombine_VV (vmax3_qf ,vmax2_qf ))); 27 28HVX_Vector vx01_hf = Q6_Vh_vdeal_Vh (Q6_Vhf_equals_Wqf32 (Q6_W_vcombine_VV (vx1_qf ,vx0_qf ))); 29HVX_Vector vx23_hf = Q6_Vh_vdeal_Vh (Q6_Vhf_equals_Wqf32 (Q6_W_vcombine_VV (vx3_qf ,vx2_qf ))); 30 31HVX_Vector vd01_qf16 = Q6_Vqf16_vmpy_VhfVhf (vmax01_hf ,Q6_Vh_vsplat_R (0x2008 ));// 1.0 / 127.0 32HVX_Vector vd23_qf16 = Q6_Vqf16_vmpy_VhfVhf (vmax23_hf ,Q6_Vh_vsplat_R (0x2008 ));// 1.0 / 127.0 33HVX_Vector vd01_hf = Q6_Vhf_equals_Vqf16 (vd01_qf16 ); 34HVX_Vector vd23_hf = Q6_Vhf_equals_Vqf16 (vd23_qf16 ); 35 36HVX_Vector vd01_inv_hf = hvx_vec_inverse_f16 (vd01_hf ); 37HVX_Vector vd23_inv_hf = hvx_vec_inverse_f16 (vd23_hf ); 38vx01_hf = Q6_Vhf_equals_Vqf16 (Q6_Vqf16_vmpy_VhfVhf (vx01_hf ,vd01_inv_hf )); 39vx23_hf = Q6_Vhf_equals_Vqf16 (Q6_Vqf16_vmpy_VhfVhf (vx23_hf ,vd23_inv_hf )); 40 41HVX_Vector vx01_i16 = hvx_vec_i16_from_hf_rnd_sat (vx01_hf ); 42HVX_Vector vx23_i16 = hvx_vec_i16_from_hf_rnd_sat (vx23_hf ); 43HVX_Vector vx_i8 = Q6_Vb_vpack_VhVh_sat (vx23_i16 ,vx01_i16 ); 44 45const HVX_Vector ones = Q6_Vb_vsplat_R (1 ); 46HVX_Vector v_sums = Q6_Vw_vrmpy_VbVb (vx_i8 ,ones ); 47v_sums = Q6_Vw_vadd_VwVw (v_sums ,Q6_V_vror_VR (v_sums ,4 )); 48v_sums = Q6_Vw_vadd_VwVw (v_sums ,Q6_V_vror_VR (v_sums ,8 )); 49v_sums = Q6_Vw_vadd_VwVw (v_sums ,Q6_V_vror_VR (v_sums ,16 )); 50 51float vmax0 [32 ] __attribute__((aligned (128 ))); 52float vmax1 [32 ] __attribute__((aligned (128 ))); 53float vmax2 [32 ] __attribute__((aligned (128 ))); 54float vmax3 [32 ] __attribute__((aligned (128 ))); 55int32_t sums [32 ] __attribute__((aligned (128 ))); 56 57hvx_vec_store_u (vmax0 ,128 ,vmax0_sf ); 58hvx_vec_store_u (vmax1 ,128 ,vmax1_sf ); 59hvx_vec_store_u (vmax2 ,128 ,vmax2_sf ); 60hvx_vec_store_u (vmax3 ,128 ,vmax3_sf ); 61hvx_vec_store_u (sums ,128 ,v_sums ); 62 63float d0 = vmax0 [0 ] /127.0f ; 64float d1 = vmax1 [0 ] /127.0f ; 65float d2 = vmax2 [0 ] /127.0f ; 66float d3 = vmax3 [0 ] /127.0f ; 67 68static const uint8_t __attribute__((aligned (128 )))repl [128 ]= { 690x00 ,0x00 ,0x00 ,0x00 ,0x04 ,0x04 ,0x04 ,0x04 ,0x08 ,0x08 ,0x08 ,0x08 ,0x04 ,0x04 ,0x04 ,0x04 , 700x10 ,0x10 ,0x10 ,0x10 ,0x04 ,0x04 ,0x04 ,0x04 ,0x08 ,0x08 ,0x08 ,0x08 ,0x04 ,0x04 ,0x04 ,0x04 , 710x20 ,0x20 ,0x20 ,0x20 ,0x04 ,0x04 ,0x04 ,0x04 ,0x08 ,0x08 ,0x08 ,0x08 ,0x04 ,0x04 ,0x04 ,0x04 , 720x10 ,0x10 ,0x10 ,0x10 ,0x04 ,0x04 ,0x04 ,0x04 ,0x08 ,0x08 ,0x08 ,0x08 ,0x04 ,0x04 ,0x04 ,0x04 , 730x40 ,0x40 ,0x40 ,0x40 ,0x04 ,0x04 ,0x04 ,0x04 ,0x08 ,0x08 ,0x08 ,0x08 ,0x04 ,0x04 ,0x04 ,0x04 , 740x10 ,0x10 ,0x10 ,0x10 ,0x04 ,0x04 ,0x04 ,0x04 ,0x08 ,0x08 ,0x08 ,0x08 ,0x04 ,0x04 ,0x04 ,0x04 , 750x20 ,0x20 ,0x20 ,0x20 ,0x04 ,0x04 ,0x04 ,0x04 ,0x08 ,0x08 ,0x08 ,0x08 ,0x04 ,0x04 ,0x04 ,0x04 , 760x10 ,0x10 ,0x10 ,0x10 ,0x04 ,0x04 ,0x04 ,0x04 ,0x08 ,0x08 ,0x08 ,0x08 ,0x04 ,0x04 ,0x04 ,0x04 , 77 }; 78HVX_Vector v_repl_ctrl = * (const HVX_Vector * )repl ; 79 80for (int b = 0 ;b < 4 ;b ++ ) { 81HVX_Vector v_act = Q6_V_vror_VR (vx_i8 ,b * 32 ); 82 83HVX_Vector r0 = Q6_V_vdelta_VV (v_act ,v_repl_ctrl ); 84HVX_Vector r1 = Q6_V_vdelta_VV (Q6_V_vror_VR (v_act ,4 ),v_repl_ctrl ); 85HVX_Vector r2 = Q6_V_vdelta_VV (Q6_V_vror_VR (v_act ,8 ),v_repl_ctrl ); 86HVX_Vector r3 = Q6_V_vdelta_VV (Q6_V_vror_VR (v_act ,12 ),v_repl_ctrl ); 87HVX_Vector r4 = Q6_V_vdelta_VV (Q6_V_vror_VR (v_act ,16 ),v_repl_ctrl ); 88HVX_Vector r5 = Q6_V_vdelta_VV (Q6_V_vror_VR (v_act ,20 ),v_repl_ctrl ); 89HVX_Vector r6 = Q6_V_vdelta_VV (Q6_V_vror_VR (v_act ,24 ),v_repl_ctrl ); 90HVX_Vector r7 = Q6_V_vdelta_VV (Q6_V_vror_VR (v_act ,28 ),v_repl_ctrl ); 91 92__fp16 scale_h ,offset_h ; 93if (b == 0 ) { 94scale_h = (__fp16 )d0 ; 95offset_h = (__fp16 ) (sums [0 ]* d0 ); 96 }else if (b == 1 ) { 97scale_h = (__fp16 )d1 ; 98offset_h = (__fp16 ) (sums [8 ]* d1 ); 99 }else if (b == 2 ) { 100scale_h = (__fp16 )d2 ; 101offset_h = (__fp16 ) (sums [16 ]* d2 ); 102 }else { 103scale_h = (__fp16 )d3 ; 104offset_h = (__fp16 ) (sums [24 ]* d3 ); 105 } 106 107HVX_Vector r_scale = Q6_Vh_vsplat_R (* (int16_t * )& scale_h ); 108HVX_Vector r_offset = Q6_Vh_vsplat_R (* (int16_t * )& offset_h ); 109 110HVX_Vector * restrictdst = (HVX_Vector * ) (y_block + b * 1280 ); 111dst [0 ]= r0 ; 112dst [1 ]= r1 ; 113dst [2 ]= r2 ; 114dst [3 ]= r3 ; 115dst [4 ]= r4 ; 116dst [5 ]= r5 ; 117dst [6 ]= r6 ; 118dst [7 ]= r7 ; 119dst [8 ]= r_scale ; 120dst [9 ]= r_offset ; 121 } 122} 123 124static inline void quantize_block_f32_q8_0_tiled (float * restrictx ,uint8_t * restricty_block ) { 125assert ((unsigned long )x %128 == 0 ); 126assert ((unsigned long )y_block %128 == 0 ); 127 128HVX_Vector * vx = (HVX_Vector * )x ; 129HVX_Vector zero = Q6_V_vzero (); 130 131HVX_Vector vx0_qf = Q6_Vqf32_vsub_VsfVsf (vx [0 ],zero ); 132HVX_Vector vx1_qf = Q6_Vqf32_vsub_VsfVsf (vx [1 ],zero ); 133HVX_Vector vx2_qf = Q6_Vqf32_vsub_VsfVsf (vx [2 ],zero ); 134HVX_Vector vx3_qf = Q6_Vqf32_vsub_VsfVsf (vx [3 ],zero ); 135 136HVX_Vector vx01_hf = Q6_Vh_vdeal_Vh (Q6_Vhf_equals_Wqf32 (Q6_W_vcombine_VV (vx1_qf ,vx0_qf ))); 137HVX_Vector vx23_hf = Q6_Vh_vdeal_Vh (Q6_Vhf_equals_Wqf32 (Q6_W_vcombine_VV (vx3_qf ,vx2_qf ))); 138 139HVX_Vector vmax_hf = hvx_vec_reduce_max_f16 (hvx_vec_abs_f16 (vx01_hf )); 140vmax_hf = hvx_vec_reduce_max2_f16 (hvx_vec_abs_f16 (vx23_hf ),vmax_hf ); 141 142HVX_Vector vd_qf16 = Q6_Vqf16_vmpy_VhfVhf (vmax_hf ,Q6_Vh_vsplat_R (0x2008 )); 143HVX_Vector vd_hf = Q6_Vhf_equals_Vqf16 (vd_qf16 ); 144 145HVX_Vector vd_inv_hf = hvx_vec_inverse_f16 (vd_hf ); 146vx01_hf = Q6_Vhf_equals_Vqf16 (Q6_Vqf16_vmpy_VhfVhf (vx01_hf ,vd_inv_hf )); 147vx23_hf = Q6_Vhf_equals_Vqf16 (Q6_Vqf16_vmpy_VhfVhf (vx23_hf ,vd_inv_hf )); 148 149HVX_Vector vx01_i16 = hvx_vec_i16_from_hf_rnd_sat (vx01_hf ); 150HVX_Vector vx23_i16 = hvx_vec_i16_from_hf_rnd_sat (vx23_hf ); 151HVX_Vector vx_i8 = Q6_Vb_vpack_VhVh_sat (vx23_i16 ,vx01_i16 ); 152 153HVX_Vector r_scale = hvx_vec_repl_f16 (vd_hf ); 154 155static const uint8_t __attribute__((aligned (128 )))repl [128 ]= { 1560x00 ,0x00 ,0x00 ,0x00 ,0x04 ,0x04 ,0x04 ,0x04 ,0x08 ,0x08 ,0x08 ,0x08 ,0x04 ,0x04 ,0x04 ,0x04 , 1570x10 ,0x10 ,0x10 ,0x10 ,0x04 ,0x04 ,0x04 ,0x04 ,0x08 ,0x08 ,0x08 ,0x08 ,0x04 ,0x04 ,0x04 ,0x04 , 1580x20 ,0x20 ,0x20 ,0x20 ,0x04 ,0x04 ,0x04 ,0x04 ,0x08 ,0x08 ,0x08 ,0x08 ,0x04 ,0x04 ,0x04 ,0x04 , 1590x10 ,0x10 ,0x10 ,0x10 ,0x04 ,0x04 ,0x04 ,0x04 ,0x08 ,0x08 ,0x08 ,0x08 ,0x04 ,0x04 ,0x04 ,0x04 , 1600x40 ,0x40 ,0x40 ,0x40 ,0x04 ,0x04 ,0x04 ,0x04 ,0x08 ,0x08 ,0x08 ,0x08 ,0x04 ,0x04 ,0x04 ,0x04 , 1610x10 ,0x10 ,0x10 ,0x10 ,0x04 ,0x04 ,0x04 ,0x04 ,0x08 ,0x08 ,0x08 ,0x08 ,0x04 ,0x04 ,0x04 ,0x04 , 1620x20 ,0x20 ,0x20 ,0x20 ,0x04 ,0x04 ,0x04 ,0x04 ,0x08 ,0x08 ,0x08 ,0x08 ,0x04 ,0x04 ,0x04 ,0x04 , 1630x10 ,0x10 ,0x10 ,0x10 ,0x04 ,0x04 ,0x04 ,0x04 ,0x08 ,0x08 ,0x08 ,0x08 ,0x04 ,0x04 ,0x04 ,0x04 , 164 }; 165HVX_Vector v_repl_ctrl = * (const HVX_Vector * )repl ; 166 167for (int b = 0 ;b < 4 ;b ++ ) { 168HVX_Vector v_act = Q6_V_vror_VR (vx_i8 ,b * 32 ); 169 170HVX_Vector r0 = Q6_V_vdelta_VV (v_act ,v_repl_ctrl ); 171HVX_Vector r1 = Q6_V_vdelta_VV (Q6_V_vror_VR (v_act ,4 ),v_repl_ctrl ); 172HVX_Vector r2 = Q6_V_vdelta_VV (Q6_V_vror_VR (v_act ,8 ),v_repl_ctrl ); 173HVX_Vector r3 = Q6_V_vdelta_VV (Q6_V_vror_VR (v_act ,12 ),v_repl_ctrl ); 174HVX_Vector r4 = Q6_V_vdelta_VV (Q6_V_vror_VR (v_act ,16 ),v_repl_ctrl ); 175HVX_Vector r5 = Q6_V_vdelta_VV (Q6_V_vror_VR (v_act ,20 ),v_repl_ctrl ); 176HVX_Vector r6 = Q6_V_vdelta_VV (Q6_V_vror_VR (v_act ,24 ),v_repl_ctrl ); 177HVX_Vector r7 = Q6_V_vdelta_VV (Q6_V_vror_VR (v_act ,28 ),v_repl_ctrl ); 178 179HVX_Vector * restrictdst = (HVX_Vector * ) (y_block + b * 1152 ); 180dst [0 ]= r0 ; 181dst [1 ]= r1 ; 182dst [2 ]= r2 ; 183dst [3 ]= r3 ; 184dst [4 ]= r4 ; 185dst [5 ]= r5 ; 186dst [6 ]= r6 ; 187dst [7 ]= r7 ; 188dst [8 ]= r_scale ; 189 } 190} 191 192static void quantize_row_f32_q8_0_tiled (float * restrictx ,uint8_t * restricty ,uint32_t k ) { 193assert (k %32 == 0 ); 194const uint32_t qk = QK_Q8_0_TILED ; 195const uint32_t nb = (k + qk - 1 ) /qk ; 196 197for (uint32_t i = 0 ;i < nb ;i ++ ) { 198uint8_t * restricty_block = y + i * 4 * 1152 ; 199quantize_block_f32_q8_0_tiled (x + i * qk ,y_block ); 200 } 201} 202 203static void quantize_row_f32_q8_1_tiled (float * restrictx ,uint8_t * restricty ,uint32_t k ) { 204assert (k %32 == 0 ); 205const uint32_t qk = QK_Q8_0_TILED ; 206const uint32_t nb = (k + qk - 1 ) /qk ; 207 208for (uint32_t i = 0 ;i < nb ;i ++ ) { 209uint8_t * restricty_block = y + i * 4 * 1280 ; 210quantize_block_f32_q8_1_tiled (x + i * qk ,y_block ); 211 } 212} 213 214// Dot kernels & helpers that consume tiled activations 215 216static inline HVX_Vector hvx_vec_mul_f16_f16_to_f32_lower32 (HVX_Vector v1 ,HVX_Vector v2 ) { 217#if __HVX_ARCH__ >=79 218HVX_VectorPair p = Q6_Wsf_vmpy_VhfVhf (v1 ,v2 ); 219return Q6_V_lo_W (Q6_W_vshuff_VVR (Q6_V_hi_W (p ),Q6_V_lo_W (p ),-4 )); 220#else 221HVX_VectorPair p = Q6_Wqf32_vmpy_VhfVhf (v1 ,v2 ); 222HVX_Vector hi = Q6_Vsf_equals_Vqf32 (Q6_V_hi_W (p )); 223HVX_Vector lo = Q6_Vsf_equals_Vqf32 (Q6_V_lo_W (p )); 224return Q6_V_lo_W (Q6_W_vshuff_VVR (hi ,lo ,-4 )); 225#endif 226} 227 228static inline HVX_Vector unpack_and_interleave_4bit (HVX_Vector v_a ,HVX_Vector v_b ,HVX_Vector mask_h4 ) { 229HVX_Vector v_W0 = Q6_V_vand_VV (v_a ,mask_h4 ); 230HVX_Vector v_W1 = Q6_Vub_vlsr_VubR (v_a ,4 ); 231HVX_Vector v_W2 = Q6_V_vand_VV (v_b ,mask_h4 ); 232HVX_Vector v_W3 = Q6_Vub_vlsr_VubR (v_b ,4 ); 233 234HVX_VectorPair v01_pair = Q6_W_vshuff_VVR (v_W1 ,v_W0 ,-1 ); 235HVX_VectorPair v23_pair = Q6_W_vshuff_VVR (v_W3 ,v_W2 ,-1 ); 236HVX_VectorPair v0123_pair = Q6_W_vshuff_VVR (Q6_V_lo_W (v23_pair ),Q6_V_lo_W (v01_pair ),-2 ); 237return Q6_V_lo_W (v0123_pair ); 238} 239 240static inline HVX_VectorPair unpack_and_interleave_4bit_x2 (HVX_Vector v_src ,HVX_Vector mask_h4 ) { 241HVX_Vector v_lo = Q6_V_vand_VV (v_src ,mask_h4 ); 242HVX_Vector v_hi = Q6_Vub_vlsr_VubR (v_src ,4 ); 243HVX_VectorPair v01_pair = Q6_W_vshuff_VVR (v_hi ,v_lo ,-1 ); 244HVX_Vector v01_lo = Q6_V_lo_W (v01_pair ); 245HVX_Vector v01_hi = Q6_V_hi_W (v01_pair ); 246 247HVX_Vector v23_lo = Q6_V_valign_VVR (v01_hi ,v01_lo ,64 ); 248HVX_Vector v_W0 = Q6_V_lo_W (Q6_W_vshuff_VVR (v23_lo ,v01_lo ,-2 )); 249 250HVX_Vector v67_lo = Q6_V_valign_VVR (v01_lo ,v01_hi ,64 ); 251HVX_Vector v_W1 = Q6_V_lo_W (Q6_W_vshuff_VVR (v67_lo ,v01_hi ,-2 )); 252 253return Q6_W_vcombine_VV (v_W1 ,v_W0 ); 254} 255 256static inline HVX_Vector accum_4bit_32x1 ( 257const HVX_Vector * restrictvptr , 258const HVX_Vector * restrictv_act , 259HVX_Vector i8 260) { 261HVX_Vector v_sum0 = Q6_V_vzero (); 262HVX_Vector v_sum1 = Q6_V_vzero (); 263HVX_Vector mask_h4 = Q6_Vb_vsplat_R (0x0F ); 264 265#pragma unroll 266for (int i = 0 ;i < 4 ;i ++ ) { 267HVX_VectorPair v_W_pair = unpack_and_interleave_4bit_x2 (vptr [i ],mask_h4 ); 268HVX_Vector v_W0 = Q6_Vb_vsub_VbVb (Q6_V_lo_W (v_W_pair ),i8 ); 269HVX_Vector v_W1 = Q6_Vb_vsub_VbVb (Q6_V_hi_W (v_W_pair ),i8 ); 270v_sum0 = Q6_Vw_vrmpyacc_VwVbVb (v_sum0 ,v_W0 ,v_act [i * 2 + 0 ]); 271v_sum1 = Q6_Vw_vrmpyacc_VwVbVb (v_sum1 ,v_W1 ,v_act [i * 2 + 1 ]); 272 } 273 274return Q6_Vw_vadd_VwVw (v_sum0 ,v_sum1 ); 275} 276 277static inline HVX_Vector accum_4bit_32x1_lut ( 278const HVX_Vector * restrictvptr , 279const HVX_Vector * restrictv_act , 280HVX_Vector mask_h4 , 281HVX_Vector lut 282) { 283HVX_Vector v_sum0 = Q6_V_vzero (); 284HVX_Vector v_sum1 = Q6_V_vzero (); 285 286#pragma unroll 287for (int i = 0 ;i < 4 ;i ++ ) { 288HVX_VectorPair v_W_pair = unpack_and_interleave_4bit_x2 (vptr [i ],mask_h4 ); 289HVX_Vector v_W0 = Q6_Vb_vlut32_VbVbI (Q6_V_lo_W (v_W_pair ),lut ,0 ); 290HVX_Vector v_W1 = Q6_Vb_vlut32_VbVbI (Q6_V_hi_W (v_W_pair ),lut ,0 ); 291v_sum0 = Q6_Vw_vrmpyacc_VwVbVb (v_sum0 ,v_W0 ,v_act [i * 2 + 0 ]); 292v_sum1 = Q6_Vw_vrmpyacc_VwVbVb (v_sum1 ,v_W1 ,v_act [i * 2 + 1 ]); 293 } 294 295return Q6_Vw_vadd_VwVw (v_sum0 ,v_sum1 ); 296} 297 298static inline HVX_VectorPair accum_4bit_32x2 ( 299const HVX_Vector * restrictvptr , 300const HVX_Vector * restrictv_act0 , 301const HVX_Vector * restrictv_act1 , 302HVX_Vector i8 303) { 304HVX_Vector v_sum0 = Q6_V_vzero (); 305HVX_Vector v_sum1 = Q6_V_vzero (); 306HVX_Vector mask_h4 = Q6_Vb_vsplat_R (0x0F ); 307 308#pragma unroll 309for (int i = 0 ;i < 4 ;i ++ ) { 310HVX_VectorPair v_W_pair = unpack_and_interleave_4bit_x2 (vptr [i ],mask_h4 ); 311HVX_Vector v_W0 = Q6_Vb_vsub_VbVb (Q6_V_lo_W (v_W_pair ),i8 ); 312HVX_Vector v_W1 = Q6_Vb_vsub_VbVb (Q6_V_hi_W (v_W_pair ),i8 ); 313 314v_sum0 = Q6_Vw_vrmpyacc_VwVbVb (v_sum0 ,v_W0 ,v_act0 [i * 2 + 0 ]); 315v_sum0 = Q6_Vw_vrmpyacc_VwVbVb (v_sum0 ,v_W1 ,v_act0 [i * 2 + 1 ]); 316 317v_sum1 = Q6_Vw_vrmpyacc_VwVbVb (v_sum1 ,v_W0 ,v_act1 [i * 2 + 0 ]); 318v_sum1 = Q6_Vw_vrmpyacc_VwVbVb (v_sum1 ,v_W1 ,v_act1 [i * 2 + 1 ]); 319 } 320 321return Q6_W_vcombine_VV (v_sum1 ,v_sum0 ); 322} 323 324static inline HVX_VectorPair accum_4bit_32x2_lut ( 325const HVX_Vector * restrictvptr , 326const HVX_Vector * restrictv_act0 , 327const HVX_Vector * restrictv_act1 , 328HVX_Vector mask_h4 , 329HVX_Vector lut 330) { 331HVX_Vector v_sum0 = Q6_V_vzero (); 332HVX_Vector v_sum1 = Q6_V_vzero (); 333 334#pragma unroll 335for (int i = 0 ;i < 4 ;i ++ ) { 336HVX_VectorPair v_W_pair = unpack_and_interleave_4bit_x2 (vptr [i ],mask_h4 ); 337HVX_Vector v_W0 = Q6_Vb_vlut32_VbVbI (Q6_V_lo_W (v_W_pair ),lut ,0 ); 338HVX_Vector v_W1 = Q6_Vb_vlut32_VbVbI (Q6_V_hi_W (v_W_pair ),lut ,0 ); 339 340v_sum0 = Q6_Vw_vrmpyacc_VwVbVb (v_sum0 ,v_W0 ,v_act0 [i * 2 + 0 ]); 341v_sum0 = Q6_Vw_vrmpyacc_VwVbVb (v_sum0 ,v_W1 ,v_act0 [i * 2 + 1 ]); 342 343v_sum1 = Q6_Vw_vrmpyacc_VwVbVb (v_sum1 ,v_W0 ,v_act1 [i * 2 + 0 ]); 344v_sum1 = Q6_Vw_vrmpyacc_VwVbVb (v_sum1 ,v_W1 ,v_act1 [i * 2 + 1 ]); 345 } 346 347return Q6_W_vcombine_VV (v_sum1 ,v_sum0 ); 348} 349 350static inline HVX_Vector accum_q8_0_32x1 ( 351const HVX_Vector * restrictvptr , 352const HVX_Vector * restrictv_act 353) { 354HVX_Vector v_sum = Q6_V_vzero (); 355#pragma unroll 356for (int g = 0 ;g < 8 ;g ++ ) { 357HVX_Vector v_rot = Q6_V_vror_VR (vptr [g ],64 ); 358HVX_Vector v_W = Q6_V_lo_W (Q6_W_vshuff_VVR (v_rot ,vptr [g ],-2 )); 359v_sum = Q6_Vw_vrmpyacc_VwVbVb (v_sum ,v_W ,v_act [g ]); 360 } 361return v_sum ; 362} 363 364static inline HVX_VectorPair accum_q8_0_32x2 ( 365const HVX_Vector * restrictvptr , 366const HVX_Vector * restrictv_act0 , 367const HVX_Vector * restrictv_act1 368) { 369HVX_Vector v_sum0 = Q6_V_vzero (); 370HVX_Vector v_sum1 = Q6_V_vzero (); 371#pragma unroll 372for (int g = 0 ;g < 8 ;g ++ ) { 373HVX_Vector v_rot = Q6_V_vror_VR (vptr [g ],64 ); 374HVX_Vector v_W = Q6_V_lo_W (Q6_W_vshuff_VVR (v_rot ,vptr [g ],-2 )); 375v_sum0 = Q6_Vw_vrmpyacc_VwVbVb (v_sum0 ,v_W ,v_act0 [g ]); 376v_sum1 = Q6_Vw_vrmpyacc_VwVbVb (v_sum1 ,v_W ,v_act1 [g ]); 377 } 378return Q6_W_vcombine_VV (v_sum1 ,v_sum0 ); 379} 380 381static void tiled_vec_dot_q4_0_32x1 (const uint32_t n ,float * restricts ,const void * restrictvx ,const void * restrictvy ,uint32_t valid_rows ,const float * restrictsz ) { 382const uint8_t * restricttile_ptr = vx ; 383const uint8_t * restricty_q = vy ; 384 385HVX_Vector v_sum_float = Q6_V_vzero (); 386HVX_Vector i8 = Q6_Vb_vsplat_R (8 ); 387 388uint32_t n_k_tiles = n /32 ; 389for (uint32_t kt = 0 ;kt < n_k_tiles ;kt ++ ) { 390const HVX_Vector * restrictvptr = (const HVX_Vector * ) (tile_ptr + kt * 640 ); 391const HVX_Vector * restrictv_act = (const HVX_Vector * ) (y_q + kt * 1152 ); 392 393HVX_Vector v_sum = accum_4bit_32x1 (vptr ,v_act ,i8 ); 394HVX_Vector v_sum_sf = Q6_Vsf_equals_Vw (v_sum ); 395 396HVX_Vector v_scale_w = vptr [4 ]; 397HVX_Vector v_scale_a = v_act [8 ]; 398HVX_Vector v_scale_comb = hvx_vec_mul_f16_f16_to_f32_lower32 (v_scale_w ,v_scale_a ); 399HVX_Vector v_sum_scaled = hvx_vec_mul_f32_f32 (v_sum_sf ,v_scale_comb ); 400 401v_sum_float = hvx_vec_add_f32_f32 (v_sum_float ,v_sum_scaled ); 402 } 403 404if (sz ) { 405hvx_vec_store_u (s ,valid_rows * sizeof (float ),hvx_vec_add_f32_f32 (v_sum_float ,hvx_vmemu (sz ))); 406 }else { 407hvx_vec_store_u (s ,valid_rows * sizeof (float ),v_sum_float ); 408 } 409} 410 411static void tiled_vec_dot_q4_0_32x2 (const uint32_t n ,float * restricts0 ,float * restricts1 ,const void * restrictvx ,const void * restrictvy0 ,const void * restrictvy1 ,uint32_t valid_rows ,const float * restrictsz0 ,const float * restrictsz1 ) { 412const uint8_t * restricttile_ptr = vx ; 413const uint8_t * restricty0_q = vy0 ; 414const uint8_t * restricty1_q = vy1 ; 415 416HVX_Vector v_sum_float_c0 = Q6_V_vzero (); 417HVX_Vector v_sum_float_c1 = Q6_V_vzero (); 418HVX_Vector i8 = Q6_Vb_vsplat_R (8 ); 419 420uint32_t n_k_tiles = n /32 ; 421uint32_t kt = 0 ; 422for (;kt + 1 < n_k_tiles ;kt += 2 ) { 423const HVX_Vector * restrictvptr0 = (const HVX_Vector * ) (tile_ptr + (kt + 0 )* 640 ); 424const HVX_Vector * restrictv_act0_0 = (const HVX_Vector * ) (y0_q + (kt + 0 )* 1152 ); 425const HVX_Vector * restrictv_act1_0 = (const HVX_Vector * ) (y1_q + (kt + 0 )* 1152 ); 426 427const HVX_Vector * restrictvptr1 = (const HVX_Vector * ) (tile_ptr + (kt + 1 )* 640 ); 428const HVX_Vector * restrictv_act0_1 = (const HVX_Vector * ) (y0_q + (kt + 1 )* 1152 ); 429const HVX_Vector * restrictv_act1_1 = (const HVX_Vector * ) (y1_q + (kt + 1 )* 1152 ); 430 431HVX_VectorPair v_sums0 = accum_4bit_32x2 (vptr0 ,v_act0_0 ,v_act1_0 ,i8 ); 432HVX_VectorPair v_sums1 = accum_4bit_32x2 (vptr1 ,v_act0_1 ,v_act1_1 ,i8 ); 433 434HVX_Vector v_sum_c0_0 = Q6_V_lo_W (v_sums0 ); 435HVX_Vector v_sum_c1_0 = Q6_V_hi_W (v_sums0 ); 436HVX_Vector v_sum_c0_1 = Q6_V_lo_W (v_sums1 ); 437HVX_Vector v_sum_c1_1 = Q6_V_hi_W (v_sums1 ); 438 439HVX_Vector v_sum_sf_c0_0 = Q6_Vsf_equals_Vw (v_sum_c0_0 ); 440HVX_Vector v_sum_sf_c1_0 = Q6_Vsf_equals_Vw (v_sum_c1_0 ); 441HVX_Vector v_sum_sf_c0_1 = Q6_Vsf_equals_Vw (v_sum_c0_1 ); 442HVX_Vector v_sum_sf_c1_1 = Q6_Vsf_equals_Vw (v_sum_c1_1 ); 443 444HVX_Vector v_scale_w0 = vptr0 [4 ]; 445HVX_Vector v_scale_w1 = vptr1 [4 ]; 446HVX_Vector v_scale_a_c0_0 = v_act0_0 [8 ]; 447HVX_Vector v_scale_a_c1_0 = v_act1_0 [8 ]; 448HVX_Vector v_scale_a_c0_1 = v_act0_1 [8 ]; 449HVX_Vector v_scale_a_c1_1 = v_act1_1 [8 ]; 450 451HVX_Vector v_scale_comb_c0_0 = hvx_vec_mul_f16_f16_to_f32_lower32 (v_scale_w0 ,v_scale_a_c0_0 ); 452HVX_Vector v_scale_comb_c1_0 = hvx_vec_mul_f16_f16_to_f32_lower32 (v_scale_w0 ,v_scale_a_c1_0 ); 453HVX_Vector v_scale_comb_c0_1 = hvx_vec_mul_f16_f16_to_f32_lower32 (v_scale_w1 ,v_scale_a_c0_1 ); 454HVX_Vector v_scale_comb_c1_1 = hvx_vec_mul_f16_f16_to_f32_lower32 (v_scale_w1 ,v_scale_a_c1_1 ); 455 456HVX_Vector v_sum_scaled_c0_0 = hvx_vec_mul_f32_f32 (v_sum_sf_c0_0 ,v_scale_comb_c0_0 ); 457HVX_Vector v_sum_scaled_c1_0 = hvx_vec_mul_f32_f32 (v_sum_sf_c1_0 ,v_scale_comb_c1_0 ); 458HVX_Vector v_sum_scaled_c0_1 = hvx_vec_mul_f32_f32 (v_sum_sf_c0_1 ,v_scale_comb_c0_1 ); 459HVX_Vector v_sum_scaled_c1_1 = hvx_vec_mul_f32_f32 (v_sum_sf_c1_1 ,v_scale_comb_c1_1 ); 460 461v_sum_float_c0 = hvx_vec_add_f32_f32 (v_sum_float_c0 ,hvx_vec_add_f32_f32 (v_sum_scaled_c0_0 ,v_sum_scaled_c0_1 )); 462v_sum_float_c1 = hvx_vec_add_f32_f32 (v_sum_float_c1 ,hvx_vec_add_f32_f32 (v_sum_scaled_c1_0 ,v_sum_scaled_c1_1 )); 463 } 464 465for (;kt < n_k_tiles ;kt ++ ) { 466const HVX_Vector * restrictvptr = (const HVX_Vector * ) (tile_ptr + kt * 640 ); 467const HVX_Vector * restrictv_act0 = (const HVX_Vector * ) (y0_q + kt * 1152 ); 468const HVX_Vector * restrictv_act1 = (const HVX_Vector * ) (y1_q + kt * 1152 ); 469 470HVX_VectorPair v_sums = accum_4bit_32x2 (vptr ,v_act0 ,v_act1 ,i8 ); 471HVX_Vector v_sum_c0 = Q6_V_lo_W (v_sums ); 472HVX_Vector v_sum_c1 = Q6_V_hi_W (v_sums ); 473 474HVX_Vector v_sum_sf_c0 = Q6_Vsf_equals_Vw (v_sum_c0 ); 475HVX_Vector v_sum_sf_c1 = Q6_Vsf_equals_Vw (v_sum_c1 ); 476 477HVX_Vector v_scale_w = vptr [4 ]; 478HVX_Vector v_scale_a_c0 = v_act0 [8 ]; 479HVX_Vector v_scale_a_c1 = v_act1 [8 ]; 480 481HVX_Vector v_scale_comb_c0 = hvx_vec_mul_f16_f16_to_f32_lower32 (v_scale_w ,v_scale_a_c0 ); 482HVX_Vector v_scale_comb_c1 = hvx_vec_mul_f16_f16_to_f32_lower32 (v_scale_w ,v_scale_a_c1 ); 483 484HVX_Vector v_sum_scaled_c0 = hvx_vec_mul_f32_f32 (v_sum_sf_c0 ,v_scale_comb_c0 ); 485HVX_Vector v_sum_scaled_c1 = hvx_vec_mul_f32_f32 (v_sum_sf_c1 ,v_scale_comb_c1 ); 486 487v_sum_float_c0 = hvx_vec_add_f32_f32 (v_sum_float_c0 ,v_sum_scaled_c0 ); 488v_sum_float_c1 = hvx_vec_add_f32_f32 (v_sum_float_c1 ,v_sum_scaled_c1 ); 489 } 490 491if (sz0 ) { 492hvx_vec_store_u (s0 ,valid_rows * sizeof (float ),hvx_vec_add_f32_f32 (v_sum_float_c0 ,hvx_vmemu (sz0 ))); 493 }else { 494hvx_vec_store_u (s0 ,valid_rows * sizeof (float ),v_sum_float_c0 ); 495 } 496if (sz1 ) { 497hvx_vec_store_u (s1 ,valid_rows * sizeof (float ),hvx_vec_add_f32_f32 (v_sum_float_c1 ,hvx_vmemu (sz1 ))); 498 }else { 499hvx_vec_store_u (s1 ,valid_rows * sizeof (float ),v_sum_float_c1 ); 500 } 501} 502 503static void tiled_vec_dot_q4_1_32x1 (const uint32_t n ,float * restricts ,const void * restrictvx ,const void * restrictvy ,uint32_t valid_rows ,const float * restrictsz ) { 504const uint8_t * restricttile_ptr = vx ; 505const uint8_t * restricty_q = vy ; 506 507HVX_Vector v_sum_float = Q6_V_vzero (); 508 509uint32_t n_k_tiles = n /32 ; 510for (uint32_t kt = 0 ;kt < n_k_tiles ;kt ++ ) { 511const HVX_Vector * restrictvptr = (const HVX_Vector * ) (tile_ptr + kt * 640 ); 512const HVX_Vector * restrictv_act = (const HVX_Vector * ) (y_q + kt * 1280 ); 513 514HVX_Vector v_sum = accum_4bit_32x1 (vptr ,v_act ,Q6_V_vzero ()); 515HVX_Vector v_sum_sf = Q6_Vsf_equals_Vw (v_sum ); 516 517HVX_Vector v_scale_offset = vptr [4 ]; 518HVX_VectorPair p_deal = Q6_W_vdeal_VVR (v_scale_offset ,v_scale_offset ,-2 ); 519HVX_Vector v_scale = Q6_V_lo_W (p_deal ); 520HVX_Vector v_offset = Q6_V_hi_W (p_deal ); 521 522HVX_Vector v_scale_a = v_act [8 ]; 523HVX_Vector v_sum_a = v_act [9 ]; 524 525HVX_Vector v_scale_comb = hvx_vec_mul_f16_f16_to_f32_lower32 (v_scale ,v_scale_a ); 526HVX_Vector v_offset_comb = hvx_vec_mul_f16_f16_to_f32_lower32 (v_offset ,v_sum_a ); 527 528HVX_Vector v_scaled_dot = hvx_vec_mul_f32_f32 (v_sum_sf ,v_scale_comb ); 529HVX_Vector v_sum_scaled = hvx_vec_add_f32_f32 (v_scaled_dot ,v_offset_comb ); 530 531v_sum_float = hvx_vec_add_f32_f32 (v_sum_float ,v_sum_scaled ); 532 } 533 534if (sz ) { 535hvx_vec_store_u (s ,valid_rows * sizeof (float ),hvx_vec_add_f32_f32 (v_sum_float ,hvx_vmemu (sz ))); 536 }else { 537hvx_vec_store_u (s ,valid_rows * sizeof (float ),v_sum_float ); 538 } 539} 540 541static void tiled_vec_dot_q4_1_32x2 (const uint32_t n ,float * restricts0 ,float * restricts1 ,const void * restrictvx ,const void * restrictvy0 ,const void * restrictvy1 ,uint32_t valid_rows ,const float * restrictsz0 ,const float * restrictsz1 ) { 542const uint8_t * restricttile_ptr = vx ; 543const uint8_t * restricty0_q = vy0 ; 544const uint8_t * restricty1_q = vy1 ; 545 546HVX_Vector v_sum_float_c0 = Q6_V_vzero (); 547HVX_Vector v_sum_float_c1 = Q6_V_vzero (); 548 549uint32_t n_k_tiles = n /32 ; 550uint32_t kt = 0 ; 551for (;kt + 1 < n_k_tiles ;kt += 2 ) { 552const HVX_Vector * restrictvptr0 = (const HVX_Vector * ) (tile_ptr + (kt + 0 )* 640 ); 553const HVX_Vector * restrictv_act0_0 = (const HVX_Vector * ) (y0_q + (kt + 0 )* 1280 ); 554const HVX_Vector * restrictv_act1_0 = (const HVX_Vector * ) (y1_q + (kt + 0 )* 1280 ); 555 556const HVX_Vector * restrictvptr1 = (const HVX_Vector * ) (tile_ptr + (kt + 1 )* 640 ); 557const HVX_Vector * restrictv_act0_1 = (const HVX_Vector * ) (y0_q + (kt + 1 )* 1280 ); 558const HVX_Vector * restrictv_act1_1 = (const HVX_Vector * ) (y1_q + (kt + 1 )* 1280 ); 559 560HVX_VectorPair v_sums0 = accum_4bit_32x2 (vptr0 ,v_act0_0 ,v_act1_0 ,Q6_V_vzero ()); 561HVX_VectorPair v_sums1 = accum_4bit_32x2 (vptr1 ,v_act0_1 ,v_act1_1 ,Q6_V_vzero ()); 562 563HVX_Vector v_sum_c0_0 = Q6_V_lo_W (v_sums0 ); 564HVX_Vector v_sum_c1_0 = Q6_V_hi_W (v_sums0 ); 565HVX_Vector v_sum_c0_1 = Q6_V_lo_W (v_sums1 ); 566HVX_Vector v_sum_c1_1 = Q6_V_hi_W (v_sums1 ); 567 568HVX_Vector v_sum_sf_c0_0 = Q6_Vsf_equals_Vw (v_sum_c0_0 ); 569HVX_Vector v_sum_sf_c1_0 = Q6_Vsf_equals_Vw (v_sum_c1_0 ); 570HVX_Vector v_sum_sf_c0_1 = Q6_Vsf_equals_Vw (v_sum_c0_1 ); 571HVX_Vector v_sum_sf_c1_1 = Q6_Vsf_equals_Vw (v_sum_c1_1 ); 572 573HVX_Vector v_scale_offset0 = vptr0 [4 ]; 574HVX_VectorPair p_deal0 = Q6_W_vdeal_VVR (v_scale_offset0 ,v_scale_offset0 ,-2 ); 575HVX_Vector v_scale0 = Q6_V_lo_W (p_deal0 ); 576HVX_Vector v_offset0 = Q6_V_hi_W (p_deal0 ); 577 578HVX_Vector v_scale_offset1 = vptr1 [4 ]; 579HVX_VectorPair p_deal1 = Q6_W_vdeal_VVR (v_scale_offset1 ,v_scale_offset1 ,-2 ); 580HVX_Vector v_scale1 = Q6_V_lo_W (p_deal1 ); 581HVX_Vector v_offset1 = Q6_V_hi_W (p_deal1 ); 582 583HVX_Vector v_scale_a_c0_0 = v_act0_0 [8 ]; 584HVX_Vector v_sum_a_c0_0 = v_act0_0 [9 ]; 585HVX_Vector v_scale_a_c1_0 = v_act1_0 [8 ]; 586HVX_Vector v_sum_a_c1_0 = v_act1_0 [9 ]; 587 588HVX_Vector v_scale_a_c0_1 = v_act0_1 [8 ]; 589HVX_Vector v_sum_a_c0_1 = v_act0_1 [9 ]; 590HVX_Vector v_scale_a_c1_1 = v_act1_1 [8 ]; 591HVX_Vector v_sum_a_c1_1 = v_act1_1 [9 ]; 592 593HVX_Vector v_scale_comb_c0_0 = hvx_vec_mul_f16_f16_to_f32_lower32 (v_scale0 ,v_scale_a_c0_0 ); 594HVX_Vector v_offset_comb_c0_0 = hvx_vec_mul_f16_f16_to_f32_lower32 (v_offset0 ,v_sum_a_c0_0 ); 595HVX_Vector v_scale_comb_c1_0 = hvx_vec_mul_f16_f16_to_f32_lower32 (v_scale0 ,v_scale_a_c1_0 ); 596HVX_Vector v_offset_comb_c1_0 = hvx_vec_mul_f16_f16_to_f32_lower32 (v_offset0 ,v_sum_a_c1_0 ); 597 598HVX_Vector v_scale_comb_c0_1 = hvx_vec_mul_f16_f16_to_f32_lower32 (v_scale1 ,v_scale_a_c0_1 ); 599HVX_Vector v_offset_comb_c0_1 = hvx_vec_mul_f16_f16_to_f32_lower32 (v_offset1 ,v_sum_a_c0_1 ); 600HVX_Vector v_scale_comb_c1_1 = hvx_vec_mul_f16_f16_to_f32_lower32 (v_scale1 ,v_scale_a_c1_1 ); 601HVX_Vector v_offset_comb_c1_1 = hvx_vec_mul_f16_f16_to_f32_lower32 (v_offset1 ,v_sum_a_c1_1 ); 602 603HVX_Vector v_scaled_dot_c0_0 = hvx_vec_mul_f32_f32 (v_sum_sf_c0_0 ,v_scale_comb_c0_0 ); 604HVX_Vector v_sum_scaled_c0_0 = hvx_vec_add_f32_f32 (v_scaled_dot_c0_0 ,v_offset_comb_c0_0 ); 605 606HVX_Vector v_scaled_dot_c1_0 = hvx_vec_mul_f32_f32 (v_sum_sf_c1_0 ,v_scale_comb_c1_0 ); 607HVX_Vector v_sum_scaled_c1_0 = hvx_vec_add_f32_f32 (v_scaled_dot_c1_0 ,v_offset_comb_c1_0 ); 608 609HVX_Vector v_scaled_dot_c0_1 = hvx_vec_mul_f32_f32 (v_sum_sf_c0_1 ,v_scale_comb_c0_1 ); 610HVX_Vector v_sum_scaled_c0_1 = hvx_vec_add_f32_f32 (v_scaled_dot_c0_1 ,v_offset_comb_c0_1 ); 611 612HVX_Vector v_scaled_dot_c1_1 = hvx_vec_mul_f32_f32 (v_sum_sf_c1_1 ,v_scale_comb_c1_1 ); 613HVX_Vector v_sum_scaled_c1_1 = hvx_vec_add_f32_f32 (v_scaled_dot_c1_1 ,v_offset_comb_c1_1 ); 614 615v_sum_float_c0 = hvx_vec_add_f32_f32 (v_sum_float_c0 ,hvx_vec_add_f32_f32 (v_sum_scaled_c0_0 ,v_sum_scaled_c0_1 )); 616v_sum_float_c1 = hvx_vec_add_f32_f32 (v_sum_float_c1 ,hvx_vec_add_f32_f32 (v_sum_scaled_c1_0 ,v_sum_scaled_c1_1 )); 617 } 618 619for (;kt < n_k_tiles ;kt ++ ) { 620const HVX_Vector * restrictvptr = (const HVX_Vector * ) (tile_ptr + kt * 640 ); 621const HVX_Vector * restrictv_act0 = (const HVX_Vector * ) (y0_q + kt * 1280 ); 622const HVX_Vector * restrictv_act1 = (const HVX_Vector * ) (y1_q + kt * 1280 ); 623 624HVX_VectorPair v_sums = accum_4bit_32x2 (vptr ,v_act0 ,v_act1 ,Q6_V_vzero ()); 625HVX_Vector v_sum_c0 = Q6_V_lo_W (v_sums ); 626HVX_Vector v_sum_c1 = Q6_V_hi_W (v_sums ); 627 628HVX_Vector v_sum_sf_c0 = Q6_Vsf_equals_Vw (v_sum_c0 ); 629HVX_Vector v_sum_sf_c1 = Q6_Vsf_equals_Vw (v_sum_c1 ); 630 631HVX_Vector v_scale_offset = vptr [4 ]; 632HVX_VectorPair p_deal = Q6_W_vdeal_VVR (v_scale_offset ,v_scale_offset ,-2 ); 633HVX_Vector v_scale = Q6_V_lo_W (p_deal ); 634HVX_Vector v_offset = Q6_V_hi_W (p_deal ); 635 636HVX_Vector v_scale_a_c0 = v_act0 [8 ]; 637HVX_Vector v_sum_a_c0 = v_act0 [9 ]; 638HVX_Vector v_scale_a_c1 = v_act1 [8 ]; 639HVX_Vector v_sum_a_c1 = v_act1 [9 ]; 640 641HVX_Vector v_scale_comb_c0 = hvx_vec_mul_f16_f16_to_f32_lower32 (v_scale ,v_scale_a_c0 ); 642HVX_Vector v_offset_comb_c0 = hvx_vec_mul_f16_f16_to_f32_lower32 (v_offset ,v_sum_a_c0 ); 643HVX_Vector v_scale_comb_c1 = hvx_vec_mul_f16_f16_to_f32_lower32 (v_scale ,v_scale_a_c1 ); 644HVX_Vector v_offset_comb_c1 = hvx_vec_mul_f16_f16_to_f32_lower32 (v_offset ,v_sum_a_c1 ); 645 646HVX_Vector v_scaled_dot_c0 = hvx_vec_mul_f32_f32 (v_sum_sf_c0 ,v_scale_comb_c0 ); 647HVX_Vector v_sum_scaled_c0 = hvx_vec_add_f32_f32 (v_scaled_dot_c0 ,v_offset_comb_c0 ); 648 649HVX_Vector v_scaled_dot_c1 = hvx_vec_mul_f32_f32 (v_sum_sf_c1 ,v_scale_comb_c1 ); 650HVX_Vector v_sum_scaled_c1 = hvx_vec_add_f32_f32 (v_scaled_dot_c1 ,v_offset_comb_c1 ); 651 652v_sum_float_c0 = hvx_vec_add_f32_f32 (v_sum_float_c0 ,v_sum_scaled_c0 ); 653v_sum_float_c1 = hvx_vec_add_f32_f32 (v_sum_float_c1 ,v_sum_scaled_c1 ); 654 } 655 656if (sz0 ) { 657hvx_vec_store_u (s0 ,valid_rows * sizeof (float ),hvx_vec_add_f32_f32 (v_sum_float_c0 ,hvx_vmemu (sz0 ))); 658 }else { 659hvx_vec_store_u (s0 ,valid_rows * sizeof (float ),v_sum_float_c0 ); 660 } 661if (sz1 ) { 662hvx_vec_store_u (s1 ,valid_rows * sizeof (float ),hvx_vec_add_f32_f32 (v_sum_float_c1 ,hvx_vmemu (sz1 ))); 663 }else { 664hvx_vec_store_u (s1 ,valid_rows * sizeof (float ),v_sum_float_c1 ); 665 } 666} 667 668static void tiled_vec_dot_q8_0_32x1 (const uint32_t n ,float * restricts ,const void * restrictvx ,const void * restrictvy ,uint32_t valid_rows ,const float * restrictsz ) { 669const uint8_t * restricttile_ptr = vx ; 670const uint8_t * restricty_q = vy ; 671 672HVX_Vector v_sum_float = Q6_V_vzero (); 673 674uint32_t n_k_tiles = n /32 ; 675for (uint32_t kt = 0 ;kt < n_k_tiles ;kt ++ ) { 676const HVX_Vector * restrictvptr = (const HVX_Vector * ) (tile_ptr + kt * 1152 ); 677const HVX_Vector * restrictv_act = (const HVX_Vector * ) (y_q + kt * 1152 ); 678 679HVX_Vector v_sum = accum_q8_0_32x1 (vptr ,v_act ); 680HVX_Vector v_sum_sf = Q6_Vsf_equals_Vw (v_sum ); 681 682HVX_Vector v_scale_w = vptr [8 ]; 683HVX_Vector v_scale_a = v_act [8 ]; 684HVX_Vector v_scale_comb = hvx_vec_mul_f16_f16_to_f32_lower32 (v_scale_w ,v_scale_a ); 685HVX_Vector v_sum_scaled = hvx_vec_mul_f32_f32 (v_sum_sf ,v_scale_comb ); 686 687v_sum_float = hvx_vec_add_f32_f32 (v_sum_float ,v_sum_scaled ); 688 } 689 690if (sz ) { 691hvx_vec_store_u (s ,valid_rows * sizeof (float ),hvx_vec_add_f32_f32 (v_sum_float ,hvx_vmemu (sz ))); 692 }else { 693hvx_vec_store_u (s ,valid_rows * sizeof (float ),v_sum_float ); 694 } 695} 696 697static void tiled_vec_dot_q8_0_32x2 (const uint32_t n ,float * restricts0 ,float * restricts1 ,const void * restrictvx ,const void * restrictvy0 ,const void * restrictvy1 ,uint32_t valid_rows ,const float * restrictsz0 ,const float * restrictsz1 ) { 698const uint8_t * restricttile_ptr = vx ; 699const uint8_t * restricty0_q = vy0 ; 700const uint8_t * restricty1_q = vy1 ; 701 702HVX_Vector v_sum_float_c0 = Q6_V_vzero (); 703HVX_Vector v_sum_float_c1 = Q6_V_vzero (); 704 705uint32_t n_k_tiles = n /32 ; 706uint32_t kt = 0 ; 707for (;kt + 1 < n_k_tiles ;kt += 2 ) { 708const HVX_Vector * restrictvptr0 = (const HVX_Vector * ) (tile_ptr + (kt + 0 )* 1152 ); 709const HVX_Vector * restrictv_act0_0 = (const HVX_Vector * ) (y0_q + (kt + 0 )* 1152 ); 710const HVX_Vector * restrictv_act1_0 = (const HVX_Vector * ) (y1_q + (kt + 0 )* 1152 ); 711 712const HVX_Vector * restrictvptr1 = (const HVX_Vector * ) (tile_ptr + (kt + 1 )* 1152 ); 713const HVX_Vector * restrictv_act0_1 = (const HVX_Vector * ) (y0_q + (kt + 1 )* 1152 ); 714const HVX_Vector * restrictv_act1_1 = (const HVX_Vector * ) (y1_q + (kt + 1 )* 1152 ); 715 716HVX_VectorPair v_sums0 = accum_q8_0_32x2 (vptr0 ,v_act0_0 ,v_act1_0 ); 717HVX_VectorPair v_sums1 = accum_q8_0_32x2 (vptr1 ,v_act0_1 ,v_act1_1 ); 718 719HVX_Vector v_sum_c0_0 = Q6_V_lo_W (v_sums0 ); 720HVX_Vector v_sum_c1_0 = Q6_V_hi_W (v_sums0 ); 721HVX_Vector v_sum_c0_1 = Q6_V_lo_W (v_sums1 ); 722HVX_Vector v_sum_c1_1 = Q6_V_hi_W (v_sums1 ); 723 724HVX_Vector v_sum_sf_c0_0 = Q6_Vsf_equals_Vw (v_sum_c0_0 ); 725HVX_Vector v_sum_sf_c1_0 = Q6_Vsf_equals_Vw (v_sum_c1_0 ); 726HVX_Vector v_sum_sf_c0_1 = Q6_Vsf_equals_Vw (v_sum_c0_1 ); 727HVX_Vector v_sum_sf_c1_1 = Q6_Vsf_equals_Vw (v_sum_c1_1 ); 728 729HVX_Vector v_scale_w0 = vptr0 [8 ]; 730HVX_Vector v_scale_w1 = vptr1 [8 ]; 731HVX_Vector v_scale_a_c0_0 = v_act0_0 [8 ]; 732HVX_Vector v_scale_a_c1_0 = v_act1_0 [8 ]; 733HVX_Vector v_scale_a_c0_1 = v_act0_1 [8 ]; 734HVX_Vector v_scale_a_c1_1 = v_act1_1 [8 ]; 735 736HVX_Vector v_scale_comb_c0_0 = hvx_vec_mul_f16_f16_to_f32_lower32 (v_scale_w0 ,v_scale_a_c0_0 ); 737HVX_Vector v_scale_comb_c1_0 = hvx_vec_mul_f16_f16_to_f32_lower32 (v_scale_w0 ,v_scale_a_c1_0 ); 738HVX_Vector v_scale_comb_c0_1 = hvx_vec_mul_f16_f16_to_f32_lower32 (v_scale_w1 ,v_scale_a_c0_1 ); 739HVX_Vector v_scale_comb_c1_1 = hvx_vec_mul_f16_f16_to_f32_lower32 (v_scale_w1 ,v_scale_a_c1_1 ); 740 741HVX_Vector v_sum_scaled_c0_0 = hvx_vec_mul_f32_f32 (v_sum_sf_c0_0 ,v_scale_comb_c0_0 ); 742HVX_Vector v_sum_scaled_c1_0 = hvx_vec_mul_f32_f32 (v_sum_sf_c1_0 ,v_scale_comb_c1_0 ); 743HVX_Vector v_sum_scaled_c0_1 = hvx_vec_mul_f32_f32 (v_sum_sf_c0_1 ,v_scale_comb_c0_1 ); 744HVX_Vector v_sum_scaled_c1_1 = hvx_vec_mul_f32_f32 (v_sum_sf_c1_1 ,v_scale_comb_c1_1 ); 745 746v_sum_float_c0 = hvx_vec_add_f32_f32 (v_sum_float_c0 ,hvx_vec_add_f32_f32 (v_sum_scaled_c0_0 ,v_sum_scaled_c0_1 )); 747v_sum_float_c1 = hvx_vec_add_f32_f32 (v_sum_float_c1 ,hvx_vec_add_f32_f32 (v_sum_scaled_c1_0 ,v_sum_scaled_c1_1 )); 748 } 749 750for (;kt < n_k_tiles ;kt ++ ) { 751const HVX_Vector * restrictvptr = (const HVX_Vector * ) (tile_ptr + kt * 1152 ); 752const HVX_Vector * restrictv_act0 = (const HVX_Vector * ) (y0_q + kt * 1152 ); 753const HVX_Vector * restrictv_act1 = (const HVX_Vector * ) (y1_q + kt * 1152 ); 754 755HVX_VectorPair v_sums = accum_q8_0_32x2 (vptr ,v_act0 ,v_act1 ); 756HVX_Vector v_sum_c0 = Q6_V_lo_W (v_sums ); 757HVX_Vector v_sum_c1 = Q6_V_hi_W (v_sums ); 758 759HVX_Vector v_sum_sf_c0 = Q6_Vsf_equals_Vw (v_sum_c0 ); 760HVX_Vector v_sum_sf_c1 = Q6_Vsf_equals_Vw (v_sum_c1 ); 761 762HVX_Vector v_scale_w = vptr [8 ]; 763HVX_Vector v_scale_a_c0 = v_act0 [8 ]; 764HVX_Vector v_scale_a_c1 = v_act1 [8 ]; 765 766HVX_Vector v_scale_comb_c0 = hvx_vec_mul_f16_f16_to_f32_lower32 (v_scale_w ,v_scale_a_c0 ); 767HVX_Vector v_scale_comb_c1 = hvx_vec_mul_f16_f16_to_f32_lower32 (v_scale_w ,v_scale_a_c1 ); 768 769HVX_Vector v_sum_scaled_c0 = hvx_vec_mul_f32_f32 (v_sum_sf_c0 ,v_scale_comb_c0 ); 770HVX_Vector v_sum_scaled_c1 = hvx_vec_mul_f32_f32 (v_sum_sf_c1 ,v_scale_comb_c1 ); 771 772v_sum_float_c0 = hvx_vec_add_f32_f32 (v_sum_float_c0 ,v_sum_scaled_c0 ); 773v_sum_float_c1 = hvx_vec_add_f32_f32 (v_sum_float_c1 ,v_sum_scaled_c1 ); 774 } 775 776if (sz0 ) { 777hvx_vec_store_u (s0 ,valid_rows * sizeof (float ),hvx_vec_add_f32_f32 (v_sum_float_c0 ,hvx_vmemu (sz0 ))); 778 }else { 779hvx_vec_store_u (s0 ,valid_rows * sizeof (float ),v_sum_float_c0 ); 780 } 781if (sz1 ) { 782hvx_vec_store_u (s1 ,valid_rows * sizeof (float ),hvx_vec_add_f32_f32 (v_sum_float_c1 ,hvx_vmemu (sz1 ))); 783 }else { 784hvx_vec_store_u (s1 ,valid_rows * sizeof (float ),v_sum_float_c1 ); 785 } 786} 787 788static void tiled_vec_dot_iq4nl_32x1 (const uint32_t n ,float * restricts ,const void * restrictvx ,const void * restrictvy ,uint32_t valid_rows ,const float * restrictsz ) { 789const uint8_t * restricttile_ptr = vx ; 790const uint8_t * restricty_q = vy ; 791 792HVX_Vector v_sum_float = Q6_V_vzero (); 793HVX_Vector mask_h4 = Q6_Vb_vsplat_R (0x0F ); 794HVX_Vector lut = * (const HVX_Vector * )kvalues_iq4nl_lut ; 795 796uint32_t n_k_tiles = n /32 ; 797for (uint32_t kt = 0 ;kt < n_k_tiles ;kt ++ ) { 798const HVX_Vector * restrictvptr = (const HVX_Vector * ) (tile_ptr + kt * 640 ); 799const HVX_Vector * restrictv_act = (const HVX_Vector * ) (y_q + kt * 1152 ); 800 801HVX_Vector v_sum = accum_4bit_32x1_lut (vptr ,v_act ,mask_h4 ,lut ); 802HVX_Vector v_sum_sf = Q6_Vsf_equals_Vw (v_sum ); 803 804HVX_Vector v_scale_w = vptr [4 ]; 805HVX_Vector v_scale_a = v_act [8 ]; 806HVX_Vector v_scale_comb = hvx_vec_mul_f16_f16_to_f32_lower32 (v_scale_w ,v_scale_a ); 807HVX_Vector v_sum_scaled = hvx_vec_mul_f32_f32 (v_sum_sf ,v_scale_comb ); 808 809v_sum_float = hvx_vec_add_f32_f32 (v_sum_float ,v_sum_scaled ); 810 } 811 812if (sz ) { 813hvx_vec_store_u (s ,valid_rows * sizeof (float ),hvx_vec_add_f32_f32 (v_sum_float ,hvx_vmemu (sz ))); 814 }else { 815hvx_vec_store_u (s ,valid_rows * sizeof (float ),v_sum_float ); 816 } 817} 818 819static void tiled_vec_dot_iq4nl_32x2 (const uint32_t n ,float * restricts0 ,float * restricts1 ,const void * restrictvx ,const void * restrictvy0 ,const void * restrictvy1 ,uint32_t valid_rows ,const float * restrictsz0 ,const float * restrictsz1 ) { 820const uint8_t * restricttile_ptr = vx ; 821const uint8_t * restricty0_q = vy0 ; 822const uint8_t * restricty1_q = vy1 ; 823 824HVX_Vector v_sum_float_c0 = Q6_V_vzero (); 825HVX_Vector v_sum_float_c1 = Q6_V_vzero (); 826HVX_Vector mask_h4 = Q6_Vb_vsplat_R (0x0F ); 827HVX_Vector lut = * (const HVX_Vector * )kvalues_iq4nl_lut ; 828 829uint32_t n_k_tiles = n /32 ; 830uint32_t kt = 0 ; 831for (;kt + 1 < n_k_tiles ;kt += 2 ) { 832const HVX_Vector * restrictvptr0 = (const HVX_Vector * ) (tile_ptr + (kt + 0 )* 640 ); 833const HVX_Vector * restrictv_act0_0 = (const HVX_Vector * ) (y0_q + (kt + 0 )* 1152 ); 834const HVX_Vector * restrictv_act1_0 = (const HVX_Vector * ) (y1_q + (kt + 0 )* 1152 ); 835 836const HVX_Vector * restrictvptr1 = (const HVX_Vector * ) (tile_ptr + (kt + 1 )* 640 ); 837const HVX_Vector * restrictv_act0_1 = (const HVX_Vector * ) (y0_q + (kt + 1 )* 1152 ); 838const HVX_Vector * restrictv_act1_1 = (const HVX_Vector * ) (y1_q + (kt + 1 )* 1152 ); 839 840HVX_VectorPair v_sums0 = accum_4bit_32x2_lut (vptr0 ,v_act0_0 ,v_act1_0 ,mask_h4 ,lut ); 841HVX_VectorPair v_sums1 = accum_4bit_32x2_lut (vptr1 ,v_act0_1 ,v_act1_1 ,mask_h4 ,lut ); 842 843HVX_Vector v_sum_c0_0 = Q6_V_lo_W (v_sums0 ); 844HVX_Vector v_sum_c1_0 = Q6_V_hi_W (v_sums0 ); 845HVX_Vector v_sum_c0_1 = Q6_V_lo_W (v_sums1 ); 846HVX_Vector v_sum_c1_1 = Q6_V_hi_W (v_sums1 ); 847 848HVX_Vector v_sum_sf_c0_0 = Q6_Vsf_equals_Vw (v_sum_c0_0 ); 849HVX_Vector v_sum_sf_c1_0 = Q6_Vsf_equals_Vw (v_sum_c1_0 ); 850HVX_Vector v_sum_sf_c0_1 = Q6_Vsf_equals_Vw (v_sum_c0_1 ); 851HVX_Vector v_sum_sf_c1_1 = Q6_Vsf_equals_Vw (v_sum_c1_1 ); 852 853HVX_Vector v_scale_w0 = vptr0 [4 ]; 854HVX_Vector v_scale_w1 = vptr1 [4 ]; 855HVX_Vector v_scale_a_c0_0 = v_act0_0 [8 ]; 856HVX_Vector v_scale_a_c1_0 = v_act1_0 [8 ]; 857HVX_Vector v_scale_a_c0_1 = v_act0_1 [8 ]; 858HVX_Vector v_scale_a_c1_1 = v_act1_1 [8 ]; 859 860HVX_Vector v_scale_comb_c0_0 = hvx_vec_mul_f16_f16_to_f32_lower32 (v_scale_w0 ,v_scale_a_c0_0 ); 861HVX_Vector v_scale_comb_c1_0 = hvx_vec_mul_f16_f16_to_f32_lower32 (v_scale_w0 ,v_scale_a_c1_0 ); 862HVX_Vector v_scale_comb_c0_1 = hvx_vec_mul_f16_f16_to_f32_lower32 (v_scale_w1 ,v_scale_a_c0_1 ); 863HVX_Vector v_scale_comb_c1_1 = hvx_vec_mul_f16_f16_to_f32_lower32 (v_scale_w1 ,v_scale_a_c1_1 ); 864 865HVX_Vector v_sum_scaled_c0_0 = hvx_vec_mul_f32_f32 (v_sum_sf_c0_0 ,v_scale_comb_c0_0 ); 866HVX_Vector v_sum_scaled_c1_0 = hvx_vec_mul_f32_f32 (v_sum_sf_c1_0 ,v_scale_comb_c1_0 ); 867HVX_Vector v_sum_scaled_c0_1 = hvx_vec_mul_f32_f32 (v_sum_sf_c0_1 ,v_scale_comb_c0_1 ); 868HVX_Vector v_sum_scaled_c1_1 = hvx_vec_mul_f32_f32 (v_sum_sf_c1_1 ,v_scale_comb_c1_1 ); 869 870v_sum_float_c0 = hvx_vec_add_f32_f32 (v_sum_float_c0 ,hvx_vec_add_f32_f32 (v_sum_scaled_c0_0 ,v_sum_scaled_c0_1 )); 871v_sum_float_c1 = hvx_vec_add_f32_f32 (v_sum_float_c1 ,hvx_vec_add_f32_f32 (v_sum_scaled_c1_0 ,v_sum_scaled_c1_1 )); 872 } 873 874for (;kt < n_k_tiles ;kt ++ ) { 875const HVX_Vector * restrictvptr = (const HVX_Vector * ) (tile_ptr + kt * 640 ); 876const HVX_Vector * restrictv_act0 = (const HVX_Vector * ) (y0_q + kt * 1152 ); 877const HVX_Vector * restrictv_act1 = (const HVX_Vector * ) (y1_q + kt * 1152 ); 878 879HVX_VectorPair v_sums = accum_4bit_32x2_lut (vptr ,v_act0 ,v_act1 ,mask_h4 ,lut ); 880HVX_Vector v_sum_c0 = Q6_V_lo_W (v_sums ); 881HVX_Vector v_sum_c1 = Q6_V_hi_W (v_sums ); 882 883HVX_Vector v_sum_sf_c0 = Q6_Vsf_equals_Vw (v_sum_c0 ); 884HVX_Vector v_sum_sf_c1 = Q6_Vsf_equals_Vw (v_sum_c1 ); 885 886HVX_Vector v_scale_w = vptr [4 ]; 887HVX_Vector v_scale_a_c0 = v_act0 [8 ]; 888HVX_Vector v_scale_a_c1 = v_act1 [8 ]; 889 890HVX_Vector v_scale_comb_c0 = hvx_vec_mul_f16_f16_to_f32_lower32 (v_scale_w ,v_scale_a_c0 ); 891HVX_Vector v_scale_comb_c1 = hvx_vec_mul_f16_f16_to_f32_lower32 (v_scale_w ,v_scale_a_c1 ); 892 893HVX_Vector v_sum_scaled_c0 = hvx_vec_mul_f32_f32 (v_sum_sf_c0 ,v_scale_comb_c0 ); 894HVX_Vector v_sum_scaled_c1 = hvx_vec_mul_f32_f32 (v_sum_sf_c1 ,v_scale_comb_c1 ); 895 896v_sum_float_c0 = hvx_vec_add_f32_f32 (v_sum_float_c0 ,v_sum_scaled_c0 ); 897v_sum_float_c1 = hvx_vec_add_f32_f32 (v_sum_float_c1 ,v_sum_scaled_c1 ); 898 } 899 900if (sz0 ) { 901hvx_vec_store_u (s0 ,valid_rows * sizeof (float ),hvx_vec_add_f32_f32 (v_sum_float_c0 ,hvx_vmemu (sz0 ))); 902 }else { 903hvx_vec_store_u (s0 ,valid_rows * sizeof (float ),v_sum_float_c0 ); 904 } 905if (sz1 ) { 906hvx_vec_store_u (s1 ,valid_rows * sizeof (float ),hvx_vec_add_f32_f32 (v_sum_float_c1 ,hvx_vmemu (sz1 ))); 907 }else { 908hvx_vec_store_u (s1 ,valid_rows * sizeof (float ),v_sum_float_c1 ); 909 } 910} 911 912static void tiled_vec_dot_mxfp4_32x1 (const uint32_t n ,float * restricts ,const void * restrictvx ,const void * restrictvy ,uint32_t valid_rows ,const float * restrictsz ) { 913const uint8_t * restricttile_ptr = vx ; 914const uint8_t * restricty_q = vy ; 915 916HVX_Vector v_sum_float = Q6_V_vzero (); 917HVX_Vector mask_h4 = Q6_Vb_vsplat_R (0x0F ); 918HVX_Vector lut = * (const HVX_Vector * )kvalues_mxfp4_lut ; 919HVX_Vector expand = * (const HVX_Vector * )expand_x32_e8m0 ; 920HVX_Vector e8m0_mask = Q6_V_vsplat_R (0x000000ff ); 921 922uint32_t n_k_tiles = n /32 ; 923for (uint32_t kt = 0 ;kt < n_k_tiles ;kt ++ ) { 924const HVX_Vector * restrictvptr = (const HVX_Vector * ) (tile_ptr + kt * 640 ); 925const HVX_Vector * restrictv_act = (const HVX_Vector * ) (y_q + kt * 1152 ); 926 927HVX_Vector v_sum = accum_4bit_32x1_lut (vptr ,v_act ,mask_h4 ,lut ); 928HVX_Vector v_sum_sf = Q6_Vsf_equals_Vw (v_sum ); 929 930HVX_Vector v_scale_w = hvx_vmem (tile_ptr + kt * 640 + 512 ); 931HVX_Vector r0_d = Q6_V_vdelta_VV (v_scale_w ,expand ); 932r0_d = Q6_V_vand_VV (r0_d ,e8m0_mask ); 933HVX_Vector v_scale_w_f32 = Q6_Vw_vasl_VwR (r0_d ,23 ); 934 935HVX_Vector v_scale_a_f16 = v_act [8 ]; 936HVX_VectorPair p_scale_a_f32 = hvx_vec_f16_to_f32_shuff (v_scale_a_f16 ); 937HVX_Vector v_scale_a = Q6_V_lo_W (p_scale_a_f32 ); 938 939HVX_Vector v_scale_comb = hvx_vec_mul_f32_f32 (v_scale_w_f32 ,v_scale_a ); 940HVX_Vector v_sum_scaled = hvx_vec_mul_f32_f32 (v_sum_sf ,v_scale_comb ); 941 942v_sum_float = hvx_vec_add_f32_f32 (v_sum_float ,v_sum_scaled ); 943 } 944 945v_sum_float = hvx_vec_mul_f32_f32 (v_sum_float ,hvx_vec_splat_f32 (0.5f )); 946 947if (sz ) { 948hvx_vec_store_u (s ,valid_rows * sizeof (float ),hvx_vec_add_f32_f32 (v_sum_float ,hvx_vmemu (sz ))); 949 }else { 950hvx_vec_store_u (s ,valid_rows * sizeof (float ),v_sum_float ); 951 } 952} 953 954static void tiled_vec_dot_mxfp4_32x2 (const uint32_t n ,float * restricts0 ,float * restricts1 ,const void * restrictvx ,const void * restrictvy0 ,const void * restrictvy1 ,uint32_t valid_rows ,const float * restrictsz0 ,const float * restrictsz1 ) { 955const uint8_t * restricttile_ptr = vx ; 956const uint8_t * restricty0_q = vy0 ; 957const uint8_t * restricty1_q = vy1 ; 958 959HVX_Vector v_sum_float_c0 = Q6_V_vzero (); 960HVX_Vector v_sum_float_c1 = Q6_V_vzero (); 961HVX_Vector mask_h4 = Q6_Vb_vsplat_R (0x0F ); 962HVX_Vector lut = * (const HVX_Vector * )kvalues_mxfp4_lut ; 963HVX_Vector expand = * (const HVX_Vector * )expand_x32_e8m0 ; 964HVX_Vector e8m0_mask = Q6_V_vsplat_R (0x000000ff ); 965 966uint32_t n_k_tiles = n /32 ; 967uint32_t kt = 0 ; 968for (;kt + 1 < n_k_tiles ;kt += 2 ) { 969const HVX_Vector * restrictvptr0 = (const HVX_Vector * ) (tile_ptr + (kt + 0 )* 640 ); 970const HVX_Vector * restrictv_act0_0 = (const HVX_Vector * ) (y0_q + (kt + 0 )* 1152 ); 971const HVX_Vector * restrictv_act1_0 = (const HVX_Vector * ) (y1_q + (kt + 0 )* 1152 ); 972 973const HVX_Vector * restrictvptr1 = (const HVX_Vector * ) (tile_ptr + (kt + 1 )* 640 ); 974const HVX_Vector * restrictv_act0_1 = (const HVX_Vector * ) (y0_q + (kt + 1 )* 1152 ); 975const HVX_Vector * restrictv_act1_1 = (const HVX_Vector * ) (y1_q + (kt + 1 )* 1152 ); 976 977HVX_VectorPair v_sums0 = accum_4bit_32x2_lut (vptr0 ,v_act0_0 ,v_act1_0 ,mask_h4 ,lut ); 978HVX_VectorPair v_sums1 = accum_4bit_32x2_lut (vptr1 ,v_act0_1 ,v_act1_1 ,mask_h4 ,lut ); 979 980HVX_Vector v_sum_c0_0 = Q6_V_lo_W (v_sums0 ); 981HVX_Vector v_sum_c1_0 = Q6_V_hi_W (v_sums0 ); 982HVX_Vector v_sum_c0_1 = Q6_V_lo_W (v_sums1 ); 983HVX_Vector v_sum_c1_1 = Q6_V_hi_W (v_sums1 ); 984 985HVX_Vector v_sum_sf_c0_0 = Q6_Vsf_equals_Vw (v_sum_c0_0 ); 986HVX_Vector v_sum_sf_c1_0 = Q6_Vsf_equals_Vw (v_sum_c1_0 ); 987HVX_Vector v_sum_sf_c0_1 = Q6_Vsf_equals_Vw (v_sum_c0_1 ); 988HVX_Vector v_sum_sf_c1_1 = Q6_Vsf_equals_Vw (v_sum_c1_1 ); 989 990HVX_Vector v_scale_w0 = hvx_vmem (tile_ptr + (kt + 0 )* 640 + 512 ); 991HVX_Vector r0_d0 = Q6_V_vdelta_VV (v_scale_w0 ,expand ); 992r0_d0 = Q6_V_vand_VV (r0_d0 ,e8m0_mask ); 993HVX_Vector v_scale_w_f32_0 = Q6_Vw_vasl_VwR (r0_d0 ,23 ); 994 995HVX_Vector v_scale_w1 = hvx_vmem (tile_ptr + (kt + 1 )* 640 + 512 ); 996HVX_Vector r0_d1 = Q6_V_vdelta_VV (v_scale_w1 ,expand ); 997r0_d1 = Q6_V_vand_VV (r0_d1 ,e8m0_mask ); 998HVX_Vector v_scale_w_f32_1 = Q6_Vw_vasl_VwR (r0_d1 ,23 ); 999 1000HVX_Vector v_scale_a_c0_f16_0 = v_act0_0 [8 ]; 1001HVX_Vector v_scale_a_c1_f16_0 = v_act1_0 [8 ]; 1002HVX_Vector v_scale_a_c0_f16_1 = v_act0_1 [8 ]; 1003HVX_Vector v_scale_a_c1_f16_1 = v_act1_1 [8 ]; 1004 1005HVX_VectorPair p_scale_a_c0_f32_0 = hvx_vec_f16_to_f32_shuff (v_scale_a_c0_f16_0 ); 1006HVX_VectorPair p_scale_a_c1_f32_0 = hvx_vec_f16_to_f32_shuff (v_scale_a_c1_f16_0 ); 1007HVX_VectorPair p_scale_a_c0_f32_1 = hvx_vec_f16_to_f32_shuff (v_scale_a_c0_f16_1 ); 1008HVX_VectorPair p_scale_a_c1_f32_1 = hvx_vec_f16_to_f32_shuff (v_scale_a_c1_f16_1 ); 1009 1010HVX_Vector v_scale_a_c0_0 = Q6_V_lo_W (p_scale_a_c0_f32_0 ); 1011HVX_Vector v_scale_a_c1_0 = Q6_V_lo_W (p_scale_a_c1_f32_0 ); 1012HVX_Vector v_scale_a_c0_1 = Q6_V_lo_W (p_scale_a_c0_f32_1 ); 1013HVX_Vector v_scale_a_c1_1 = Q6_V_lo_W (p_scale_a_c1_f32_1 ); 1014 1015HVX_Vector v_scale_comb_c0_0 = hvx_vec_mul_f32_f32 (v_scale_w_f32_0 ,v_scale_a_c0_0 ); 1016HVX_Vector v_scale_comb_c1_0 = hvx_vec_mul_f32_f32 (v_scale_w_f32_0 ,v_scale_a_c1_0 ); 1017HVX_Vector v_scale_comb_c0_1 = hvx_vec_mul_f32_f32 (v_scale_w_f32_1 ,v_scale_a_c0_1 ); 1018HVX_Vector v_scale_comb_c1_1 = hvx_vec_mul_f32_f32 (v_scale_w_f32_1 ,v_scale_a_c1_1 ); 1019 1020HVX_Vector v_sum_scaled_c0_0 = hvx_vec_mul_f32_f32 (v_sum_sf_c0_0 ,v_scale_comb_c0_0 ); 1021HVX_Vector v_sum_scaled_c1_0 = hvx_vec_mul_f32_f32 (v_sum_sf_c1_0 ,v_scale_comb_c1_0 ); 1022HVX_Vector v_sum_scaled_c0_1 = hvx_vec_mul_f32_f32 (v_sum_sf_c0_1 ,v_scale_comb_c0_1 ); 1023HVX_Vector v_sum_scaled_c1_1 = hvx_vec_mul_f32_f32 (v_sum_sf_c1_1 ,v_scale_comb_c1_1 ); 1024 1025v_sum_float_c0 = hvx_vec_add_f32_f32 (v_sum_float_c0 ,hvx_vec_add_f32_f32 (v_sum_scaled_c0_0 ,v_sum_scaled_c0_1 )); 1026v_sum_float_c1 = hvx_vec_add_f32_f32 (v_sum_float_c1 ,hvx_vec_add_f32_f32 (v_sum_scaled_c1_0 ,v_sum_scaled_c1_1 )); 1027 } 1028 1029for (;kt < n_k_tiles ;kt ++ ) { 1030const HVX_Vector * restrictvptr = (const HVX_Vector * ) (tile_ptr + kt * 640 ); 1031const HVX_Vector * restrictv_act0 = (const HVX_Vector * ) (y0_q + kt * 1152 ); 1032const HVX_Vector * restrictv_act1 = (const HVX_Vector * ) (y1_q + kt * 1152 ); 1033 1034HVX_VectorPair v_sums = accum_4bit_32x2_lut (vptr ,v_act0 ,v_act1 ,mask_h4 ,lut ); 1035HVX_Vector v_sum_c0 = Q6_V_lo_W (v_sums ); 1036HVX_Vector v_sum_c1 = Q6_V_hi_W (v_sums ); 1037 1038HVX_Vector v_sum_sf_c0 = Q6_Vsf_equals_Vw (v_sum_c0 ); 1039HVX_Vector v_sum_sf_c1 = Q6_Vsf_equals_Vw (v_sum_c1 ); 1040 1041HVX_Vector v_scale_w = hvx_vmem (tile_ptr + kt * 640 + 512 ); 1042HVX_Vector r0_d = Q6_V_vdelta_VV (v_scale_w ,expand ); 1043r0_d = Q6_V_vand_VV (r0_d ,e8m0_mask ); 1044HVX_Vector v_scale_w_f32 = Q6_Vw_vasl_VwR (r0_d ,23 ); 1045 1046HVX_Vector v_scale_a_c0_f16 = v_act0 [8 ]; 1047HVX_Vector v_scale_a_c1_f16 = v_act1 [8 ]; 1048 1049HVX_VectorPair p_scale_a_c0_f32 = hvx_vec_f16_to_f32_shuff (v_scale_a_c0_f16 ); 1050HVX_VectorPair p_scale_a_c1_f32 = hvx_vec_f16_to_f32_shuff (v_scale_a_c1_f16 ); 1051 1052HVX_Vector v_scale_a_c0 = Q6_V_lo_W (p_scale_a_c0_f32 ); 1053HVX_Vector v_scale_a_c1 = Q6_V_lo_W (p_scale_a_c1_f32 ); 1054 1055HVX_Vector v_scale_comb_c0 = hvx_vec_mul_f32_f32 (v_scale_w_f32 ,v_scale_a_c0 ); 1056HVX_Vector v_scale_comb_c1 = hvx_vec_mul_f32_f32 (v_scale_w_f32 ,v_scale_a_c1 ); 1057 1058HVX_Vector v_sum_scaled_c0 = hvx_vec_mul_f32_f32 (v_sum_sf_c0 ,v_scale_comb_c0 ); 1059HVX_Vector v_sum_scaled_c1 = hvx_vec_mul_f32_f32 (v_sum_sf_c1 ,v_scale_comb_c1 ); 1060 1061v_sum_float_c0 = hvx_vec_add_f32_f32 (v_sum_float_c0 ,v_sum_scaled_c0 ); 1062v_sum_float_c1 = hvx_vec_add_f32_f32 (v_sum_float_c1 ,v_sum_scaled_c1 ); 1063 } 1064 1065v_sum_float_c0 = hvx_vec_mul_f32_f32 (v_sum_float_c0 ,hvx_vec_splat_f32 (0.5f )); 1066v_sum_float_c1 = hvx_vec_mul_f32_f32 (v_sum_float_c1 ,hvx_vec_splat_f32 (0.5f )); 1067 1068if (sz0 ) { 1069hvx_vec_store_u (s0 ,valid_rows * sizeof (float ),hvx_vec_add_f32_f32 (v_sum_float_c0 ,hvx_vmemu (sz0 ))); 1070 }else { 1071hvx_vec_store_u (s0 ,valid_rows * sizeof (float ),v_sum_float_c0 ); 1072 } 1073if (sz1 ) { 1074hvx_vec_store_u (s1 ,valid_rows * sizeof (float ),hvx_vec_add_f32_f32 (v_sum_float_c1 ,hvx_vmemu (sz1 ))); 1075 }else { 1076hvx_vec_store_u (s1 ,valid_rows * sizeof (float ),v_sum_float_c1 ); 1077 } 1078} 1079 1080static inline void quantize_f32_q8_0_tiled_kernel ( 1081const uint8_t * restrictsrc_data , 1082uint8_t * restrictdst_data , 1083uint8_t * restricttmp_data , 1084uint32_t ne0 , 1085uint32_t nrows , 1086size_t src_row_size , 1087size_t dst_row_size 1088) { 1089const size_t src_row_size_padded = hex_round_up (src_row_size ,QK_Q8_0_TILED * sizeof (float )); 1090hvx_splat_f32_a (tmp_data ,0.0f ,src_row_size_padded /sizeof (float )); 1091 1092for (uint32_t i = 0 ;i < nrows ;++ i ) { 1093hex_l2fetch (src_data ,src_row_size ,src_row_size ,2 ); 1094hvx_copy_f32_aa (tmp_data ,src_data ,ne0 ); 1095 1096quantize_row_f32_q8_0_tiled ((float * )tmp_data ,dst_data ,ne0 ); 1097dst_data += dst_row_size ; 1098src_data += src_row_size ; 1099 } 1100} 1101 1102static inline void quantize_f32_q8_1_tiled_kernel ( 1103const uint8_t * restrictsrc_data , 1104uint8_t * restrictdst_data , 1105uint8_t * restricttmp_data , 1106uint32_t ne0 , 1107uint32_t nrows , 1108size_t src_row_size , 1109size_t dst_row_size 1110) { 1111const size_t src_row_size_padded = hex_round_up (src_row_size ,QK_Q8_0_TILED * sizeof (float )); 1112hvx_splat_f32_a (tmp_data ,0.0f ,src_row_size_padded /sizeof (float )); 1113 1114for (uint32_t i = 0 ;i < nrows ;++ i ) { 1115hex_l2fetch (src_data ,src_row_size ,src_row_size ,2 ); 1116hvx_copy_f32_aa (tmp_data ,src_data ,ne0 ); 1117 1118quantize_row_f32_q8_1_tiled ((float * )tmp_data ,dst_data ,ne0 ); 1119dst_data += dst_row_size ; 1120src_data += src_row_size ; 1121 } 1122} 1123 1124static inline void quantize_f32_q8_0_tiled_block_kernel ( 1125const float * restrictsrc , 1126uint8_t * restrictdst , 1127uint8_t * restricttmp_data , 1128uint32_t ne0 , 1129uint32_t ib_first , 1130uint32_t ib_last , 1131size_t src_row_size , 1132size_t dst_row_size , 1133uint32_t r , 1134uint32_t c 1135) { 1136const uint32_t qk = QK_Q8_0_TILED ; 1137const uint32_t nb = (ne0 + qk - 1 ) /qk ; 1138 1139for (uint32_t ib = ib_first ;ib < ib_last ;++ ib ) { 1140const uint8_t * restrictsrc_ptr = (const uint8_t * )src + r * src_row_size + c * qk * sizeof (float ); 1141uint8_t * restrictdst_ptr = dst + r * dst_row_size + c * 4 * 1152 ; 1142 1143hex_l2fetch (src_ptr ,qk * sizeof (float ),qk * sizeof (float ),1 ); 1144 1145if (c == nb - 1 ) { 1146uint32_t active_elements = ne0 - c * qk ; 1147hvx_splat_f32_a (tmp_data ,0.0f ,qk ); 1148hvx_copy_f32_aa (tmp_data ,src_ptr ,active_elements ); 1149 }else { 1150hvx_copy_f32_aa (tmp_data ,src_ptr ,qk ); 1151 } 1152 1153quantize_block_f32_q8_0_tiled ((float * )tmp_data ,dst_ptr ); 1154 1155c ++ ; 1156if (c == nb ) { 1157c = 0 ; 1158r ++ ; 1159 } 1160 } 1161} 1162 1163static inline void quantize_f32_q8_1_tiled_block_kernel ( 1164const float * restrictsrc , 1165uint8_t * restrictdst , 1166uint8_t * restricttmp_data , 1167uint32_t ne0 , 1168uint32_t ib_first , 1169uint32_t ib_last , 1170size_t src_row_size , 1171size_t dst_row_size , 1172uint32_t r , 1173uint32_t c 1174) { 1175const uint32_t qk = QK_Q8_0_TILED ; 1176const uint32_t nb = (ne0 + qk - 1 ) /qk ; 1177 1178for (uint32_t ib = ib_first ;ib < ib_last ;++ ib ) { 1179const uint8_t * restrictsrc_ptr = (const uint8_t * )src + r * src_row_size + c * qk * sizeof (float ); 1180uint8_t * restrictdst_ptr = dst + r * dst_row_size + c * 4 * 1280 ; 1181 1182hex_l2fetch (src_ptr ,qk * sizeof (float ),qk * sizeof (float ),1 ); 1183 1184if (c == nb - 1 ) { 1185uint32_t active_elements = ne0 - c * qk ; 1186hvx_splat_f32_a (tmp_data ,0.0f ,qk ); 1187hvx_copy_f32_aa (tmp_data ,src_ptr ,active_elements ); 1188 }else { 1189hvx_copy_f32_aa (tmp_data ,src_ptr ,qk ); 1190 } 1191 1192quantize_block_f32_q8_1_tiled ((float * )tmp_data ,dst_ptr ); 1193 1194c ++ ; 1195if (c == nb ) { 1196c = 0 ; 1197r ++ ; 1198 } 1199 } 1200}