char-fork/llama.cpp

git clone https://git.t4t.associates/char-fork/llama.cpp

YiChen Lvmetal: per-op source split + parallel compile (#26561)b615f5b4b

char/aliceai-t5-moe
6.3 KiB228 linesraw
1#include "common.h"
2
3kernel void kernel_op_sum_f32(
4        constant ggml_metal_kargs_sum & args,
5        device const float * src0,
6        device       float * dst,
7        threadgroup  float * shmem_f32 [[threadgroup(0)]],
8        uint3   tgpig[[threadgroup_position_in_grid]],
9        ushort3 tpitg[[thread_position_in_threadgroup]],
10        ushort  sgitg[[simdgroup_index_in_threadgroup]],
11        ushort  tiisg[[thread_index_in_simdgroup]],
12        ushort3   ntg[[threads_per_threadgroup]]) {
13
14    if (args.np == 0) {
15        return;
16    }
17
18    // TODO: become function constant
19    const uint nsg = (ntg.x + 31) / 32;
20
21    float sumf = 0;
22
23    for (uint64_t i0 = tpitg.x; i0 < args.np; i0 += ntg.x) {
24        sumf += src0[i0];
25    }
26
27    sumf = simd_sum(sumf);
28
29    if (tiisg == 0) {
30        shmem_f32[sgitg] = sumf;
31    }
32
33    threadgroup_barrier(mem_flags::mem_threadgroup);
34
35    float total = 0;
36
37    if (sgitg == 0) {
38        float v = 0;
39
40        if (tpitg.x < nsg) {
41            v = shmem_f32[tpitg.x];
42        }
43
44        total = simd_sum(v);
45
46        if (tpitg.x == 0) {
47            dst[0] = total;
48        }
49    }
50}
51
52constant short FC_sum_rows_op [[function_constant(FC_SUM_ROWS + 0)]];
53
54template <typename T0, typename T>
55kernel void kernel_sum_rows_impl(
56        constant ggml_metal_kargs_sum_rows & args,
57        device const char * src0,
58        device       char * dst,
59        threadgroup  char * shmem [[threadgroup(0)]],
60        uint3   tgpig[[threadgroup_position_in_grid]],
61        ushort3 tpitg[[thread_position_in_threadgroup]],
62        ushort  sgitg[[simdgroup_index_in_threadgroup]],
63        ushort  tiisg[[thread_index_in_simdgroup]],
64        ushort3   ntg[[threads_per_threadgroup]]) {
65#define FC_OP  FC_sum_rows_op
66
67    const int i3 = tgpig.z;
68    const int i2 = tgpig.y;
69    const int i1 = tgpig.x;
70
71    threadgroup T0 * shmem_t = (threadgroup T0 *) shmem;
72
73    if (sgitg == 0) {
74        shmem_t[tiisg] = 0.0f;
75    }
76
77    device const T0 * src_row = (device const T0 *) (src0 + i1*args.nb01 + i2*args.nb02 + i3*args.nb03);
78    device       T  * dst_row = (device       T  *) (dst  + i1*args.nb1  + i2*args.nb2  + i3*args.nb3);
79
80    T0 sumf = T0(0.0f);
81
82    for (int64_t i0 = tpitg.x; i0 < args.ne00; i0 += ntg.x) {
83        sumf += src_row[i0];
84    }
85
86    sumf = simd_sum(sumf);
87
88    threadgroup_barrier(mem_flags::mem_threadgroup);
89
90    if (tiisg == 0) {
91        shmem_t[sgitg] = sumf;
92    }
93
94    threadgroup_barrier(mem_flags::mem_threadgroup);
95
96    sumf = shmem_t[tiisg];
97    sumf = simd_sum(sumf);
98
99    if (tpitg.x == 0) {
100        if (FC_OP == OP_SUM_ROWS_NUM_MEAN) {
101            if (is_same<float4, T0>::value) {
102                dst_row[0] = sum(sumf) / (4*args.ne00);
103            } else {
104                dst_row[0] = sum(sumf) / args.ne00;
105            }
106        } else {
107            dst_row[0] = sum(sumf);
108        }
109    }
110
111#undef FC_OP
112}
113
114typedef decltype(kernel_sum_rows_impl<float, float>) kernel_sum_rows_t;
115
116template [[host_name("kernel_sum_rows_f32_f32")]]   kernel kernel_sum_rows_t kernel_sum_rows_impl<float,  float>;
117template [[host_name("kernel_sum_rows_f32_f32_4")]] kernel kernel_sum_rows_t kernel_sum_rows_impl<float4, float>;
118
119template<typename T>
120kernel void kernel_cumsum_blk(
121        constant ggml_metal_kargs_cumsum_blk & args,
122        device const char * src0,
123        device       char * tmp,
124        device       char * dst,
125        threadgroup  char * shmem [[threadgroup(0)]],
126        uint3   tgpig[[threadgroup_position_in_grid]],
127        ushort3 tpitg[[thread_position_in_threadgroup]],
128        ushort  sgitg[[simdgroup_index_in_threadgroup]],
129        ushort  tiisg[[thread_index_in_simdgroup]],
130        ushort3   ntg[[threads_per_threadgroup]]) {
131    const int ib = tgpig[0]/args.ne01;
132
133    const int i00 = ib*ntg.x;
134    const int i01 = tgpig[0]%args.ne01;
135    const int i02 = tgpig[1];
136    const int i03 = tgpig[2];
137
138    device const float * src0_row = (device const float *) (src0 +
139            args.nb01*i01 +
140            args.nb02*i02 +
141            args.nb03*i03);
142
143    threadgroup float * shmem_f32 = (threadgroup float *) shmem;
144
145    float v = 0.0f;
146
147    if (i00 + tpitg.x < args.ne00) {
148        v = src0_row[i00 + tpitg.x];
149    }
150
151    float s = simd_prefix_inclusive_sum(v);
152
153    if (tiisg == N_SIMDWIDTH - 1) {
154        shmem_f32[sgitg] = s;
155    }
156
157    threadgroup_barrier(mem_flags::mem_threadgroup);
158
159    if (sgitg == 0) {
160        shmem_f32[tiisg] = simd_prefix_exclusive_sum(shmem_f32[tiisg]);
161    }
162
163    threadgroup_barrier(mem_flags::mem_threadgroup);
164
165    s += shmem_f32[sgitg];
166
167    device float * dst_row = (device float *) dst +
168        args.ne00*i01 +
169        args.ne00*args.ne01*i02 +
170        args.ne00*args.ne01*args.ne02*i03;
171
172    if (i00 + tpitg.x < args.ne00) {
173        dst_row[i00 + tpitg.x] = s;
174    }
175
176    if (args.outb && tpitg.x == ntg.x - 1) {
177        device float * tmp_row = (device float *) tmp +
178            args.net0*i01 +
179            args.net0*args.net1*i02 +
180            args.net0*args.net1*args.net2*i03;
181
182        tmp_row[ib] = s;
183    }
184}
185
186typedef decltype(kernel_cumsum_blk<float>) kernel_cumsum_blk_t;
187
188template [[host_name("kernel_cumsum_blk_f32")]] kernel kernel_cumsum_blk_t kernel_cumsum_blk<float>;
189
190template<typename T>
191kernel void kernel_cumsum_add(
192        constant ggml_metal_kargs_cumsum_add & args,
193        device const char * tmp,
194        device       char * dst,
195        uint3   tgpig[[threadgroup_position_in_grid]],
196        ushort3 tpitg[[thread_position_in_threadgroup]],
197        ushort  sgitg[[simdgroup_index_in_threadgroup]],
198        ushort  tiisg[[thread_index_in_simdgroup]],
199        ushort3   ntg[[threads_per_threadgroup]]) {
200    const int ib = tgpig[0]/args.ne01;
201
202    if (ib == 0) {
203        return;
204    }
205
206    const int i00 = ib*ntg.x;
207    const int i01 = tgpig[0]%args.ne01;
208    const int i02 = tgpig[1];
209    const int i03 = tgpig[2];
210
211    device const float * tmp_row = (device const float *) (tmp +
212            args.nbt1*i01 +
213            args.nbt2*i02 +
214            args.nbt3*i03);
215
216    device float * dst_row = (device float *) dst +
217        args.ne00*i01 +
218        args.ne00*args.ne01*i02 +
219        args.ne00*args.ne01*args.ne02*i03;
220
221    if (i00 + tpitg.x < args.ne00) {
222        dst_row[i00 + tpitg.x] += tmp_row[ib - 1];
223    }
224}
225
226typedef decltype(kernel_cumsum_add<float>) kernel_cumsum_add_t;
227
228template [[host_name("kernel_cumsum_add_f32")]] kernel kernel_cumsum_add_t kernel_cumsum_add<float>;