char-fork/llama.cpp
git clone https://git.t4t.associates/char-fork/llama.cpp
987fbd821
char/aliceai-t5-moe
1// 2// MIT license 3// Copyright (C) 2026 Intel Corporation 4// SPDX-License-Identifier: MIT 5// 6 7// 8// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 9// See https://llvm.org/LICENSE.txt for license information. 10// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 11// 12 13#include "pool.hpp" 14#include <float.h> 15 16template < typename Ti ,typename To > 17static void pool2d_nchw_kernel ( 18const int ih ,const int iw ,const int oh ,const int ow , 19const int kh ,const int kw ,const int sh ,const int sw , 20const int ph ,const int pw ,const int parallel_elements , 21const Ti * src ,To * dst ,const enum ggml_op_pool op , 22const sycl::nd_item < 3 > & item_ct1 ) { 23int idx = item_ct1 .get_local_id (2 )+ 24item_ct1 .get_group (2 )* item_ct1 .get_local_range (2 ); 25if (idx >=parallel_elements ) { 26return ; 27 } 28 29const int I_HW = ih * iw ; 30const int O_HW = oh * ow ; 31const int nc = idx /O_HW ; 32const int cur_oh = idx %O_HW /ow ; 33const int cur_ow = idx %O_HW %ow ; 34const Ti * i_ptr = src + nc * I_HW ; 35To * o_ptr = dst + nc * O_HW ; 36const int start_h = cur_oh * sh - ph ; 37const int bh = sycl::max (0 ,start_h ); 38const int eh = sycl::min (ih ,start_h + kh ); 39const int start_w = cur_ow * sw - pw ; 40const int bw = sycl::max (0 ,start_w ); 41const int ew = sycl::min (iw ,start_w + kw ); 42 43To res = 0 ; 44 45switch (op ) { 46case GGML_OP_POOL_AVG :res = 0 ;break ; 47case GGML_OP_POOL_MAX :res = - FLT_MAX ;break ; 48default : 49res = (To ) sycl::nan (uint32_t (0 )); 50break ; 51 } 52 53for (int i = bh ;i < eh ;i += 1 ) { 54for (int j = bw ;j < ew ;j += 1 ) { 55Ti cur = i_ptr [i * iw + j ]; 56switch (op ) { 57case GGML_OP_POOL_AVG :res += (cur / (kh * kw ));break ; 58case GGML_OP_POOL_MAX :res = sycl::max (res , (To )cur );break ; 59default : 60res = (To ) sycl::nan (uint32_t (0 )); 61break ; 62 } 63 } 64 } 65o_ptr [cur_oh * ow + cur_ow ]= res ; 66} 67 68template < typename Ti ,typename To > 69static void pool1d_ncw_kernel ( 70const int iw ,const int ow , 71const int k ,const int s , 72const int p ,const int parallel_elements , 73const Ti * src ,To * dst ,const enum ggml_op_pool op , 74const sycl::nd_item < 3 > & item_ct1 ) { 75int idx = item_ct1 .get_local_id (2 )+ 76item_ct1 .get_group (2 )* item_ct1 .get_local_range (2 ); 77if (idx >=parallel_elements ) { 78return ; 79 } 80 81const int nc = idx /ow ; 82const int cur_ow = idx %ow ; 83const Ti * i_ptr = src + nc * iw ; 84To * o_ptr = dst + nc * ow ; 85const int start = cur_ow * s - p ; 86const int b = sycl::max (0 ,start ); 87const int e = sycl::min (iw ,start + k ); 88 89To res = 0 ; 90switch (op ) { 91case GGML_OP_POOL_AVG :res = 0 ;break ; 92case GGML_OP_POOL_MAX :res = - FLT_MAX ;break ; 93default : 94res = (To ) sycl::nan (uint32_t (0 )); 95break ; 96 } 97 98for (int j = b ;j < e ;j += 1 ) { 99Ti cur = i_ptr [j ]; 100switch (op ) { 101case GGML_OP_POOL_AVG :res += cur ;break ; 102case GGML_OP_POOL_MAX :res = sycl::max (res , (To )cur );break ; 103default : 104res = (To ) sycl::nan (uint32_t (0 )); 105break ; 106 } 107 } 108 109const int count = e - b ; 110if (op == GGML_OP_POOL_AVG ) { 111res = (count > 0 ) ? (res /count ) : (To )0 ; 112 } 113o_ptr [cur_ow ]= res ; 114} 115 116void ggml_sycl_op_pool2d (ggml_backend_sycl_context & ctx ,ggml_tensor * dst ) { 117GGML_ASSERT (dst -> src [0 ]-> type == GGML_TYPE_F32 ); 118GGML_ASSERT (dst -> type == GGML_TYPE_F32 ); 119 dpct::queue_ptr main_stream = ctx .stream (); 120SYCL_CHECK (ggml_sycl_set_device (ctx .device )); 121const float * src0_dd = static_cast < const float *> (dst -> src [0 ]-> data ); 122float * dst_dd = static_cast < float *> (dst -> data ); 123 124const int32_t * opts = (const int32_t * )dst -> op_params ; 125enum ggml_op_pool op = static_cast < ggml_op_pool > (opts [0 ]); 126const int k0 = opts [1 ]; 127const int k1 = opts [2 ]; 128const int s0 = opts [3 ]; 129const int s1 = opts [4 ]; 130const int p0 = opts [5 ]; 131const int p1 = opts [6 ]; 132 133const int64_t IH = dst -> src [0 ]-> ne [1 ]; 134const int64_t IW = dst -> src [0 ]-> ne [0 ]; 135 136const int64_t N = dst -> ne [3 ]; 137const int64_t OC = dst -> ne [2 ]; 138const int64_t OH = dst -> ne [1 ]; 139const int64_t OW = dst -> ne [0 ]; 140 141const int parallel_elements = N * OC * OH * OW ; 142const int num_blocks = (parallel_elements + SYCL_POOL2D_BLOCK_SIZE - 1 ) /SYCL_POOL2D_BLOCK_SIZE ; 143 sycl::range < 3 > block_nums (1 ,1 ,num_blocks ); 144main_stream -> parallel_for ( 145 sycl::nd_range < 3 > (block_nums * 146 sycl::range < 3 > (1 ,1 ,SYCL_IM2COL_BLOCK_SIZE ), 147 sycl::range < 3 > (1 ,1 ,SYCL_IM2COL_BLOCK_SIZE )), 148 [= ](sycl::nd_item < 3 > item_ct1 ) { 149pool2d_nchw_kernel (IH ,IW ,OH ,OW ,k1 ,k0 ,s1 ,s0 ,p1 ,p0 , 150parallel_elements ,src0_dd ,dst_dd ,op , 151item_ct1 ); 152 }); 153} 154 155void ggml_sycl_op_pool1d (ggml_backend_sycl_context & ctx ,ggml_tensor * dst ) { 156GGML_ASSERT (dst -> src [0 ]-> type == GGML_TYPE_F32 ); 157GGML_ASSERT (dst -> type == GGML_TYPE_F32 ); 158 dpct::queue_ptr main_stream = ctx .stream (); 159SYCL_CHECK (ggml_sycl_set_device (ctx .device )); 160const float * src0_dd = static_cast < const float *> (dst -> src [0 ]-> data ); 161float * dst_dd = static_cast < float *> (dst -> data ); 162 163const int32_t * opts = (const int32_t * )dst -> op_params ; 164enum ggml_op_pool op = static_cast < ggml_op_pool > (opts [0 ]); 165const int k0 = opts [1 ]; 166const int s0 = opts [2 ]; 167const int p0 = opts [3 ]; 168 169const int64_t IW = dst -> src [0 ]-> ne [0 ]; 170const int64_t OW = dst -> ne [0 ]; 171const int64_t NC = dst -> ne [3 ]* dst -> ne [2 ]* dst -> ne [1 ]; 172 173const int parallel_elements = NC * OW ; 174const int num_blocks = (parallel_elements + SYCL_POOL1D_BLOCK_SIZE - 1 ) /SYCL_POOL1D_BLOCK_SIZE ; 175 sycl::range < 3 > block_nums (1 ,1 ,num_blocks ); 176main_stream -> parallel_for ( 177 sycl::nd_range < 3 > (block_nums * 178 sycl::range < 3 > (1 ,1 ,SYCL_POOL1D_BLOCK_SIZE ), 179 sycl::range < 3 > (1 ,1 ,SYCL_POOL1D_BLOCK_SIZE )), 180 [= ](sycl::nd_item < 3 > item_ct1 ) { 181pool1d_ncw_kernel (IW ,OW ,k0 ,s0 ,p0 , 182parallel_elements ,src0_dd ,dst_dd ,op , 183item_ct1 ); 184 }); 185}